播放音乐和 频率计设计.docx
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- 上传时间:2023-07-15
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播放音乐和 频率计设计.docx
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播放音乐和频率计设计
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
USEIEEE.STD_LOGIC_UNSIGNED.ALL;
USEIEEE.STD_LOGIC_ARITH.ALL;
ENTITYfengpingIS
PORT(clk:
INSTD_LOGIC;
clk4hz:
OUTSTD_LOGIC;
clk1mhz:
OUTSTD_LOGIC);
ENDfengping;
ARCHITECTUREONEOFfengpingIS
signalcount:
integer;
signalcount1:
integer;
begin
process(clk)
begin
if(clk'eventandclk='1')then
if(count1=12500000)then
count1<=0;
else
count1<=count1+1;
ifcount1<6250000then
clk4hz<='0';
else
clk4hz<='1';
endif;
endif;
endif;
endprocess;
process(clk)
begin
if(clk'eventandclk='1')then
if(count=50)then
count<=0;
else
count<=count+1;
ifcount<25then
clk1mhz<='0';
else
clk1mhz<='1';
endif;
endif;
endif;
endprocess;
end;
libraryieee;
useieee.std_logic_1164.all;
entitynotetabsis
port(
clk:
instd_logic;
toneindex:
outintegerrange0to15);
endnotetabs;
architecturebehavofnotetabsis
signalcounter:
integerrange0to138;
begin
cnt8:
process(clk,counter)
begin
ifcounter=138then
counter<=0;
elsifclk'eventandclk='1'then
counter<=counter+1;
endif;
endprocess;
search:
process(counter)
begin
casecounteris
when00=>toneindex<=3;
when01=>toneindex<=3;
when02=>toneindex<=3;
when03=>toneindex<=3;
when04=>toneindex<=5;
when05=>toneindex<=5;
when06=>toneindex<=5;
when07=>toneindex<=6;
when08=>toneindex<=8;
when09=>toneindex<=8;
when10=>toneindex<=8;
when11=>toneindex<=9;
when12=>toneindex<=6;
when13=>toneindex<=8;
when14=>toneindex<=5;
when15=>toneindex<=5;
when16=>toneindex<=12;
when17=>toneindex<=12;
when18=>toneindex<=12;
when19=>toneindex<=15;
when20=>toneindex<=13;
when21=>toneindex<=12;
when22=>toneindex<=10;
when23=>toneindex<=12;
when24=>toneindex<=9;
when25=>toneindex<=9;
when26=>toneindex<=9;
when27=>toneindex<=9;
when28=>toneindex<=9;
when29=>toneindex<=9;
when30=>toneindex<=9;
when31=>toneindex<=0;
when32=>toneindex<=9;
when33=>toneindex<=9;
when34=>toneindex<=9;
when35=>toneindex<=10;
when36=>toneindex<=7;
when37=>toneindex<=7;
when38=>toneindex<=6;
when39=>toneindex<=6;
when40=>toneindex<=5;
when41=>toneindex<=5;
when42=>toneindex<=5;
when43=>toneindex<=6;
when44=>toneindex<=8;
when45=>toneindex<=8;
when46=>toneindex<=9;
when47=>toneindex<=9;
when48=>toneindex<=3;
when49=>toneindex<=3;
when50=>toneindex<=8;
when51=>toneindex<=8;
when52=>toneindex<=6;
when53=>toneindex<=5;
when54=>toneindex<=6;
when55=>toneindex<=8;
when56=>toneindex<=5;
when57=>toneindex<=5;
when58=>toneindex<=5;
when59=>toneindex<=5;
when60=>toneindex<=5;
when61=>toneindex<=5;
when62=>toneindex<=5;
when63=>toneindex<=5;
when64=>toneindex<=10;
when65=>toneindex<=10;
when66=>toneindex<=10;
when67=>toneindex<=12;
when68=>toneindex<=7;
when69=>toneindex<=7;
when70=>toneindex<=9;
when71=>toneindex<=9;
when72=>toneindex<=6;
when73=>toneindex<=8;
when74=>toneindex<=5;
when75=>toneindex<=5;
when76=>toneindex<=5;
when77=>toneindex<=5;
when78=>toneindex<=5;
when79=>toneindex<=5;
when80=>toneindex<=3;
when81=>toneindex<=5;
when82=>toneindex<=3;
when83=>toneindex<=3;
when84=>toneindex<=5;
when85=>toneindex<=6;
when86=>toneindex<=7;
when87=>toneindex<=9;
when88=>toneindex<=6;
when89=>toneindex<=6;
when90=>toneindex<=6;
when91=>toneindex<=6;
when92=>toneindex<=6;
when93=>toneindex<=6;
when94=>toneindex<=5;
when95=>toneindex<=6;
when96=>toneindex<=8;
when97=>toneindex<=8;
when98=>toneindex<=8;
when99=>toneindex<=9;
when100=>toneindex<=12;
when101=>toneindex<=12;
when102=>toneindex<=12;
when103=>toneindex<=10;
when104=>toneindex<=9;
when105=>toneindex<=9;
when106=>toneindex<=10;
when107=>toneindex<=9;
when108=>toneindex<=8;
when109=>toneindex<=8;
when110=>toneindex<=6;
when111=>toneindex<=5;
when112=>toneindex<=3;
when113=>toneindex<=3;
when114=>toneindex<=3;
when115=>toneindex<=3;
when116=>toneindex<=8;
when117=>toneindex<=8;
when118=>toneindex<=8;
when119=>toneindex<=8;
when120=>toneindex<=6;
when121=>toneindex<=8;
when122=>toneindex<=6;
when123=>toneindex<=5;
when124=>toneindex<=3;
when125=>toneindex<=5;
when126=>toneindex<=6;
when127=>toneindex<=8;
when128=>toneindex<=5;
when129=>toneindex<=5;
when130=>toneindex<=5;
when131=>toneindex<=5;
when132=>toneindex<=5;
when133=>toneindex<=5;
when134=>toneindex<=5;
when135=>toneindex<=5;
when136=>toneindex<=0;
when137=>toneindex<=0;
when138=>toneindex<=0;
whenothers=>null;
endcase;
endprocess;
endbehav;
libraryieee;
useieee.std_logic_1164.all;
entityspeakeris
port(
clk:
instd_logic;
tone:
inintegerrange0to16#7ff#;--"2047";
spks:
outstd_logic);
endspeaker;
architecturebehavofspeakeris
signalfullspks:
std_logic;
begin
genspks:
process(clk,tone)--"clk=1MHZ";
variablecount11:
integerrange0to16#7ff#;--"2047";
begin
ifclk'eventandclk='1'then
ifcount11=16#7ff#then--b"111,1111,1111";
count11:
=tone;
fullspks<='1';
elsecount11:
=count11+1;
fullspks<='0';
endif;
endif;
endprocess;
delay:
process(fullspks)--"fullspks=488.2815HZ";
variablecount2:
std_logic;
begin
iffullspks'eventandfullspks='1'then
count2:
=notcount2;
ifcount2='1'then
spks<='1';
else
spks<='0';--"spks=244.14075HZ";
endif;
endif;
endprocess;
endbehav;
libraryieee;
useieee.std_logic_1164.all;
entitytonetabais
port(
index:
inintegerrange0to15;
code:
outintegerrange0to15;
tone:
outintegerrange0to16#7ff#);--"2047";
endtonetaba;
architecturebehavoftonetabais
begin
search:
process(index)
begin
caseindexis
when0=>tone<=2047;code<=0;
when1=>tone<=773;code<=1;
when2=>tone<=912;code<=2;
when3=>tone<=1036;code<=3;
when5=>tone<=1197;code<=5;
when6=>tone<=1290;code<=6;
when7=>tone<=1372;code<=7;
when8=>tone<=1410;code<=1;
when9=>tone<=1480;code<=2;
when10=>tone<=1542;code<=3;
when12=>tone<=1622;code<=5;
when13=>tone<=1668;code<=6;
when15=>tone<=1728;code<=1;
whenothers=>null;
endcase;
endprocess;
endbehav;
频率计
libraryieee;
useieee.std_logic_1164.all;
useieee.std_logic_unsigned.all;
entitytestctlis
port(
clk:
instd_logic;
tsten:
outstd_logic;
clr_cnt:
outstd_logic;
load:
outstd_logic);
endtestctl;
architecturebehavoftestctlis
signaldiv2clk:
std_logic;
begin
process(clk)
begin
if(clk'eventandclk='1')then
div2clk<=notdiv2clk;
endif;
endprocess;
process(clk,div2clk)
begin
if(clk='0'anddiv2clk='0')then
clr_cnt<='1';
else
clr_cnt<='0';
endif;
endprocess;
load<=notdiv2clk;
tsten<=div2clk;
endbehav;
libraryieee;
useieee.std_logic_1164.all;
entityreg32bis
port(load:
instd_logic;
din:
instd_logic_vector(31downto0);
dout:
outstd_logic_vector(31downto0));
endreg32b;
architecturebehavofreg32bis
begin
process(load,din)
begin
if(load'eventandload='1')then
dout<=din;
endif;
endprocess;
endbehav;
libraryieee;
useieee.std_logic_1164.all;
entitycnt10is
port(clk:
instd_logic;
clr:
instd_logic;
ena:
instd_logic;
cq:
outintegerrange0to15;
carry_out:
outstd_logic);
endcnt10;
architecturebehavofcnt10is
signalcqi:
integerrange0to15;
begin
process(clr,clk,ena)
begin
if(clr='1')then
cqi<=0;
elsif(clk'eventandclk='1')then
if(ena='1')then
if(cqi<9)then
cqi<=cqi+1;
else
cqi<=0;
endif;
endif;
endif;
endprocess;
process(cqi)
begin
if(cqi=9)then
carry_out<='1';
else
carry_out<='0';
endif;
endprocess;
cq<=cqi;
endbehav;
libraryieee;
useieee.std_logic_1164.all;
useieee.std_logic_unsigned.all;
entityseltimeis
port(
clk:
instd_logic;
rst:
instd_logic;
din:
instd_logic_vector(31downto0);
daout:
outstd_logic_vector(3downto0);
sel:
outstd_logic_vector(2downto0));
endseltime;
architecturebehavofseltimeis
signalsec:
std_logic_vector(2downto0);
begin
process(rst,clk)
begin
if(rst='0')then
sec<="000";
elsif(clk'eventandclk='1')then
if(sec="111")then
sec<="000";
else
sec<=sec+1;
endif;
endif;
endprocess;
process(sec,din(31downto0))
begin
casesecis
when"000"=>daout<=din(3downto0);
when"001"=>daout<=din(7downto4);
when"010"=>daout<=din(11downto8);
when"011"=>daout<=din(15downto12);
when"100"=>daout<=din(19downto16);
when"101"=>daout<=din(23downto20);
when"110"=>daout<=din(27downto24);
when"111"=>daout<=din(31downto28);
whenothers=>daout<="XXXX";
endcase;
endprocess;
sel<=sec;
endbehav;
libraryieee;
useieee.std_logic_1164.all;
entityDDSis
port(SEL:
instd_logic_vector(2downto0);
dig:
outstd_logic_vector(7downto0));
endDDS;
architectureoneofDDSis
signaldig_r:
std_logic_vector(7downto0);
begin
process(SEL)
begin
caseSELis
--选择数码管显示位
WHEN"000"=>dig_r<="11111110";--选择第一个数码管显示
WHEN"001"=>dig_r<="11111101";--选择第二个数码管显示
WHEN"010"=>dig_r<="11111011";--选择第三个数码管显示
WHEN"011"=>dig_r<="11110111";--选择第四个数码管显示
WHEN"100"=>dig_r<="11101111";--选择第五个数码管显示
WHEN"101"=>dig_r<="11011111";--选择第六个数码管显示
WHEN"110"=>dig_r<="10111111";--选择第七个数码管显示
WHEN"111"=>dig_r<="01111111";--选择第八个数码管显示
ENDCASE;
ENDPROCESS;
dig<=dig_r;
endone;
libraryieee;
useieee.std_logic_1164.all;
useieee.std_logic_unsigned.all;
entitydiv_fis
port(clk:
instd_logic;
onehz_out:
outstd_logic;
five_h_hz_out:
outstd_logic;
one_h_khz_out:
outstd_logic;
one_M_hz_out:
outstd_logic;
five_M_hz_out:
outstd_logic;
two_h_hz_out:
outstd_logic;
fifty_hz_out:
outstd_logic;
ten_hz_out:
outstd_logic;
twnty_f_hz_out:
outstd_logic;
zeros_one_hz_out:
outstd_logic;
one_h_hz_out:
outstd_logic;
five_h_khz_out:
outstd_logic);
enddiv_f;
architecturebeha
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