8051系列微控制器英文文献翻译.docx
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8051系列微控制器英文文献翻译.docx
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8051系列微控制器英文文献翻译
英文原文
Overview
The8051familyofmicrocontrollersisbasedonanarchitecturewhichishighlyoptimizedforembeddedcontrolsystems.ItisusedinawidevarietyofapplicationsfrommilitaryequipmenttoautomobilestothekeyboardonyourPC.SecondonlytotheMotorola68HC11ineightbitprocessorssales,the8051familyofmicrocontrollersisavailableinawidearrayofvariationsfrommanufacturerssuchasIntel,Philips,andSiemens.Thesemanufacturershaveaddednumerousfeaturesandperipheralstothe8051suchasI2Cinterfaces,analogtodigitalconverters,watchdogtimers,andpulsewidthmodulatedoutputs.Variationsofthe8051withclockspeedsupto40MHzandvoltagerequirementsdownto1.5voltsareavailable.Thiswiderangeofpartsbasedononecoremakesthe8051familyanexcellentchoiceasthebasearchitectureforacompany'sentirelineofproductssinceitcanperformmanyfunctionsanddeveloperswillonlyhavetolearnthisoneplatform.
Thebasicarchitectureconsistsofthefollowingfeatures:
1aneightbitALU
232descreteI/Opins(4groupsof8)whichcanbeindividuallyaccessed
3two16bittimer/counters
4fullduplexUART
56interruptsourceswith2prioritylevels
6128bytesofonboardRAM
7separate64KbyteaddressspacesforDATAandCODEmemory
One8051processorcycleconsistsoftwelveoscillatorperiods.Eachofthetwelveoscillatorperiodsisusedforaspecialfunctionbythe8051coresuchasopcodefetchesandsamplesoftheinterruptdaisychainforpendinginterrupts.Thetimerequiredforany8051instructioncanbecomputedbydividingtheclockfrequencyby12,invertingthatresultandmultiplyingitbythenumberofprocessorcyclesrequiredbytheinstructioninquestion.Therefore,ifyouhaveasystemwhichisusingan11.059MHzclock,youcancomputethenumberofinstructionspersecondbydividingthisvalueby12.Thisgivesaninstructionfrequencyof921583instructionspersecond.Invertingthiswillprovidetheamountoftimetakenbyeachinstructioncycle(1.085microseconds).
MemoryOrganization
The8051architectureprovidestheuserwiththreephysicallydistinctmemoryspaceswhichcanbeseeninFigureA-1.Eachmemoryspaceconsistsofcontiguousaddressesfrom0tothemaximumsize,inbytes,ofthememoryspace.Addressoverlapsareresolvedbyutilizinginstructionswhichreferspecificallytoagivenaddressspace.Thethreememoryspacesfunctionasdescribedbelow.
TheCODESpace
ThefirstmemoryspaceistheCODEsegmentinwhichtheexecutableprogramresides.Thissegmentcanbeupto64K(sinceitisaddressedby16addresslines).TheprocessortreatsthissegmentasreadonlyandwillgeneratesignalsappropriatetoaccessamemorydevicesuchasanEPROM.However,thisdoesnotmeanthattheCODEsegmentmustbeimplementedusinganEPROM.ManyembeddedsystemsthesedaysareusingEEPROMwhichallowsthememorytobeoverwritteneitherbythe8051itselforbyanexternaldevice.ThismakesupgradestotheproducteasytodosincenewsoftwarecanbedownloadedintotheEEPROMratherthanhavingtodisassembleitandinstallanewEPROM.Additionally,batterybackedSRAMcanbeusedinplaceofanEPROM.ThismethodoffersthesamecapabilitytouploadnewsoftwaretotheunitasdoesanEEPROM,anddoesnothaveanysortofread/writecyclelimitationssuchasanEEPROMhas.However,whenthebatterysupplyingtheRAMeventuallydies,sodoesthesoftwareinit.UsinganSRAMinplaceofanEPROMindevelopmentsystemsallowsforrapiddownloadingofnewcodeintothetargetsystem.Whenthiscanbedone,ithelpsavoidthecycleofprogramming/testing/erasingwithEPROM,andcanalsohelpavoidhasslesoveranincircuitemulatorwhichisusuallyararecommodity.
Inadditiontoexecutablecode,itiscommonpracticewiththe8051tostorefixedlookuptablesintheCODEsegment.Tofacilitatethis,the8051providesinstructionswhichallowrapidaccesstotablesviathedatapointer(DPTR)ortheprogramcounterwithanoffsetintothetableoptionallyprovidedbytheaccumulator.Thismeansthatoftentimes,atable'sbaseaddresscanbeloadedinDPTRandtheelementofthetabletoaccesscanbeheldintheaccumulator.Theadditionisperformedbythe8051duringtheexecutionoftheinstructionwhichcansavemanycyclesdependingonthesituation.Anexampleofthisisshownlaterinthischapterin.
TheDATASpace
Thesecondmemoryspaceisthe128bytesofinternalRAMonthe8051,orthefirst128bytesofinternalRAMonthe8052.ThissegmentistypicallyreferredtoastheDATAsegment.TheRAMlocationsinthissegmentareaccessedinoneortwocyclesdependingontheinstruction.ThisaccesstimeismuchquickerthanaccesstotheXDATAsegmentbecausememoryisaddresseddirectlyratherthanviaamemorypointersuchasDPTRwhichmustfirstbeinitialized.Therefore,frequentlyusedvariablesandtemporaryscratchvariablesareusuallyassignedtotheDATAsegment.Suchallocationmustbedonewithcare,however,duetothelimitedamountofmemoryinthissegment.
VariablesstoredintheDATAsegmentcanalsobeaccessedindirectlyviaR0orR1.Theregisterbeingusedasthememorypointermustcontaintheaddressofthebytetoberetrievedoraltered.Theseinstructionscantakeoneortwoprocessorcyclesdependingonthesource/destinationdatabyte.
TheDATAsegmentcontainstwosmallersegmentsofinterest.Thefirstsubsegmentconsistsofthefoursetsofregisterbankswhichcomposethefirst32bytesofRAM.The8051canuseanyofthesefourgroupsofeightbytesasitsdefaultregisterbank.TheselectionofregisterbanksischangeableatanytimeviatheRS1andtheRS0bitsintheProcessorStatusWord(PSW).Thesetwobitscombineintoanumberfrom0to3(withRS1beingthemostsignificantbit)whichindicatestheregisterbanktobeused.Registerbankswitchingallowsnotonlyforquickparameterpassing,butalsoopensthedoorforsimplifyingtaskswitchingonthe8051.
Thesecondsub-segmentintheDATAspaceisabitaddressablesegmentinwhicheachbitcanbeindividuallyaccessed.ThissegmentisreferredtoastheBDATAsegment.Thebitaddressablesegmentconsistsof16bytes(128bits)abovethefourregisterbanksinmemory.The8051containsseveralsinglebitinstructionswhichareoftenveryusefulincontrolapplicationsandaidinreplacingexternalcombinatoriallogicwithsoftwareinthe8051thusreducingpartscountonthetargetsystem.Itshouldbenotedthatthese16bytescanalsobeaccessedona"byte-wide"basisjustlikeanyotherbyteintheDATAspace.
SpecialFunctionRegisters
Controlregistersfortheinterruptsystemandtheperipheralsonthe8051arecontainedininternalRAMatlocations80hexandabove.Theseregistersarereferredtoasspecialfunction
Registers(orSFRforshort).Manyofthemarebitaddressable.ThebitsinthebitaddressableSFRcaneitherbeaccessedbyname,indexorbitaddress.Thus,youcanrefertotheEAbitoftheInterruptEnableSFRasEA,IE.7,or0AFH.TheSFRcontrolthingssuchasthefunctionofthetimer/counters,theUART,andtheinterruptsourcesaswellastheirpriorities.TheseregistersareaccessedbythesamesetofinstructionsasthebytesandbitsintheDATAsegment.AmemorymapoftheSFRSindicatingtheregisterswhicharebitaddressableisshowninTableA-1.
TheIDATASpace
Certain8051familymemberssuchasthe8052containanadditional128bytesofinternalRAMwhichresideatRAMlocations80hexandabove.ThissegmentofRAMistypicallyreferredtoastheIDATAsegment.BecausetheIDATAaddressesandtheSFRaddressesoverlap,addressconflictsbetweenIDATARAMandtheSFRsareresolvedbythetypeofmemoryaccessbeingperformed,sincetheIDATAsegmentcanonlybeaccessedviaindirectaddressingmodes.
TheXDATASpace.
Thefinal8051memoryspaceis64Kinlengthandisaddressedbythesame16addresslinesastheCODEsegment.Thisspaceistypicallyreferredtoastheexternaldatamemoryspace(ortheXDATAsegmentforshort).ThissegmentusuallyconsistsofsomesortofRAM(usuallyanSRAM)andtheI/Odevicesorexternalperipheralstowhichthe8051mustinterfaceviaitsbus.ReadorwriteoperationstothissegmenttakeaminimumoftwoprocessorcyclesandareperformedusingeitherDPTR,R0,orR1.InthecaseofDPTR,itusuallytakestwoprocessorcyclesormoretoloadthedesiredaddressinadditiontothetwocyclesrequiredtoperformthereadorwriteoperation.Similarly,loadingR0orR1willtakeminimumofonecycleinadditiontothetwocyclesimposedbythememoryaccessitself.Therefore,itiseasytoseethatatypicaloperationwiththeXDATAsegmentwill,ingeneral,takeaminimumofthreeprocessorcycles.Becauseofthis,theDATAsegmentisaveryattractiveplacetostoreanyfrequently.
usedvariables
Itispossibletofillthissegmententirelywith64KofRAMifthe8051doesnotneedtoperformanyI/OwithdevicesinitsbusorifthedesignerwishestocycletheRAMonandoffwhenI/Odevicesarebeingaccessedviathebus.Methodsforperformingthistechniquewillbediscussedinchapterslaterinthisbook.
On-BoardTimer/Counters
Thestandard8051hastwotimer/counters(other8051familymembershavevaryingamounts),eachofwhichisafull16bits.Eachtimer/countercanbefunctionasafreerunningtimer(inwhichcasetheycountprocessorcycles)orcanbeusedtocountfallingedgesonthesignalappliedtotheirrespectiveI/Opin(eitherT0orT1).Whenusedasacounter,theinputsignalmusthaveafrequencyequaltoorlowerthantheinstructioncyclefrequencydividedby2(ie:
theoscillatorfrequency/24)sincetheincomingsi
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