计算机组织与结构英文版课后答案Word格式文档下载.docx
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计算机组织与结构英文版课后答案Word格式文档下载.docx
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Chapter4:
CacheMemory14
Chapter5:
InternalMemory27
Chapter6:
ExternalMemory33
Chapter7:
Input/Output37
Chapter8:
OperatingSystemSupport43
Chapter9:
ComputerArithmetic48
Chapter10:
InstructionSets:
CharacteristicsandFunctions61
Chapter11:
AddressingModesandFormats72
Chapter12:
ProcessorStructureandFunction77
Chapter13:
ReducedInstructionSetComputers(RISCs)83
Chapter14:
Instruction-LevelParallelismandSuperscalarProcessors87
Chapter15:
TheIA-64Architecture93
Chapter16:
ControlUnitOperation97
Chapter17:
MicroprogrammedControl100
Chapter18:
ParallelProcessing103
AppendixA:
NumberSystems112
AppendixB:
DigitalLogic113
Chapter2
ComputerEvolutionandPerformance
AnswerstoQuestions
2.1Inastoredprogramcomputer,programsarerepresentedinaformsuitableforstoringinmemoryalongsidethedata.Thecomputergetsitsinstructionsbyreadingthemfrommemory,andaprogramcanbesetoralteredbysettingthevaluesofaportionofmemory.
2.2Amainmemory,whichstoresbothdataandinstructions:
anarithmeticandlogicunit(ALU)capableofoperatingonbinarydata;
acontrolunit,whichinterpretstheinstructionsinmemoryandcausesthemtobeexecuted;
andinputandoutput(I/O)equipmentoperatedbythecontrolunit.
2.3Gates,memorycells,andinterconnectionsamonggatesandmemorycells.
2.4Mooreobservedthatthenumberoftransistorsthatcouldbeputonasinglechipwasdoublingeveryyearandcorrectlypredictedthatthispacewouldcontinueintothenearfuture.
2.5Similaroridenticalinstructionset:
Inmanycases,thesamesetofmachineinstructionsissupportedonallmembersofthefamily.Thus,aprogramthatexecutesononemachinewillalsoexecuteonanyother.Similaroridenticaloperatingsystem:
Thesamebasicoperatingsystemisavailableforallfamilymembers.Increasingspeed:
Therateofinstructionexecutionincreasesingoingfromlowertohigherfamilymembers.IncreasingNumberofI/Oports:
Ingoingfromlowertohigherfamilymembers.Increasingmemorysize:
Ingoingfromlowertohigherfamilymembers.Increasingcost:
Ingoingfromlowertohigherfamilymembers.
2.6Inamicroprocessor,allofthecomponentsoftheCPUareonasinglechip.
AnswerstoProblems
2.1Thisprogramisdevelopedin[HAYE98].ThevectorsA,B,andCareeachstoredin1,000contiguouslocationsinmemory,beginningatlocations1001,2001,and3001,respectively.Theprogrambeginswiththelefthalfoflocation3.AcountingvariableNissetto999anddecrementedaftereachstepuntilitreaches–1.Thus,thevectorsareprocessedfromhighlocationtolowlocation.
Location
Instruction
Comments
999
Constant(countN)
1
Constant
2
1000
3L
LOADM(2000)
TransferA(I)toAC
3R
ADDM(3000)
ComputeA(I)+B(I)
4L
STORM(4000)
TransfersumtoC(I)
4R
LOADM(0)
LoadcountN
5L
SUBM
(1)
DecrementNby1
5R
JUMP+M(6,20:
39)
TestNandbranchto6Rifnonnegative
6L
JUMPM(6,0:
19)
Halt
6R
STORM(0)
UpdateN
7L
ADDM
(1)
IncrementACby1
7R
ADDM
(2)
8L
STORM(3,8:
Modifyaddressin3L
8R
9L
STORM(3,28:
Modifyaddressin3R
9R
10L
STORM(4,8:
Modifyaddressin4L
10R
JUMPM(3,0:
Branchto3L
2.2a.
Opcode
Operand
00000001
000000000010
b.First,theCPUmustmakeaccessmemorytofetchtheinstruction.Theinstructioncontainstheaddressofthedatawewanttoload.Duringtheexecutephaseaccessesmemorytoloadthedatavaluelocatedatthataddressforatotaloftwotripstomemory.
2.3Toreadavaluefrommemory,theCPUputstheaddressofthevalueitwantsintotheMAR.TheCPUthenassertstheReadcontrollinetomemoryandplacestheaddressontheaddressbus.Memoryplacesthecontentsofthememorylocationpassedonthedatabus.ThisdataisthentransferredtotheMBR.Towriteavaluetomemory,theCPUputstheaddressofthevalueitwantstowriteintotheMAR.TheCPUalsoplacesthedataitwantstowriteintotheMBR.TheCPUthenassertstheWritecontrollinetomemoryandplacestheaddressontheaddressbusandthedataonthedatabus.Memorytransfersthedataonthedatabusintothecorrespondingmemorylocation.
2.4
Address
Contents
08A
08B
08C
08D
LOADM(0FA)
STORM(0FB)
JUMP+M(08D)
LOAD–M(0FA)
Thisprogramwillstoretheabsolutevalueofcontentatmemorylocation0FAintomemorylocation0FB.
2.5Alldatapathsto/fromMBRare40bits.Alldatapathsto/fromMARare12bits.Pathsto/fromACare40bits.Pathsto/fromMQare40bits.
2.6Thepurposeistoincreaseperformance.Whenanaddressispresentedtoamemorymodule,thereissometimedelaybeforethereadorwriteoperationcanbeperformed.Whilethisishappening,anaddresscanbepresentedtotheothermodule.Foraseriesofrequestsforsuccessivewords,themaximumrateisdoubled.
2.7Thediscrepancycanbeexplainedbynotingthatothersystemcomponentsasidefromclockspeedmakeabigdifferenceinoverallsystemspeed.Inparticular,memorysystemsandadvancesinI/Oprocessingcontributetotheperformanceratio.Asystemisonlyasfastasitsslowestlink.Inrecentyears,thebottleneckshavebeentheperformanceofmemorymodulesandbusspeed.
2.8AsnotedintheanswertoProblem2.7,eventhoughtheIntelmachinemayhaveafasterclockspeed(2.4GHzvs.1.2GHz),thatdoesnotnecessarilymeanthesystemwillperformfaster.Differentsystemsarenotcomparableonclockspeed.Otherfactorssuchasthesystemcomponents(memory,buses,architecture)andtheinstructionsetsmustalsobetakenintoaccount.Amoreaccuratemeasureistorunbothsystemsonabenchmark.Benchmarkprogramsexistforcertaintasks,suchasrunningofficeapplications,performingfloatingpointoperations,graphicsoperations,andsoon.Thesystemscanbecomparedtoeachotheronhowlongtheytaketocompletethesetasks.AccordingtoAppleComputer,theG4iscomparableorbetterthanahigher-clockspeedPentiumonmanybenchmarks.
2.9Thisrepresentationiswastefulbecausetorepresentasingledecimaldigitfrom0through9weneedtohavetentubes.IfwecouldhaveanarbitrarynumberofthesetubesONatthesametime,thenthosesametubescouldbetreatedasbinarybits.Withtenbits,wecanrepresent210patterns,or1024patterns.Forintegers,thesepatternscouldbeusedtorepresentthenumbersfrom0through1023.
2.10
Ic
p
m
k
Instructionsetarchitecture
X
Compilertechnology
Processorimplementation
Cacheandmemoryhierarchy
Source:
[HWAN93]
2.11MIPSrate=f/(CPI106)
2.12a.WecanexpresstheMIPsrateas:
[(MIPSrate)/106]=Ic/T.Sothat:
Ic=T[(MIPSrate)/106].TheratiooftheinstructioncountoftheRS/6000totheVAXis[x18]/[12x1]=1.5.
b.FortheVax,CPI=(5MHz)/(1MIPS)=5.
FortheRS/6000,CPI=25/18=1.39.
2.13CPI=1.55;
MIPSrate=25.8;
Executiontime=3.87ns.Source:
2.14a.Ultimately,theuserisconcernedwiththeexecutiontimeofasystem,notitsexecutionrate.IfwetakearithmeticmeanoftheMIPSratesofvariousbenchmarkprograms,wegetaresultthatisproportionaltothesumoftheinversesofexecutiontimes.Butthisisnotinverselyproportionaltothesumofexecutiontimes.Inotherwords,thearithmeticmeanoftheMIPSratedoesnotcleanlyrelatetoexecutiontime.Ontheotherhand,theharmonicmeanMIPSrateistheinverseoftheaverageexecutiontime.
b.
Arithmeticmean
HarmonicMean
Rank
ComputerA
25.3MIPS
0.25MIPS
ComputerB
2.8MIPS
0.21MIPS
3
ComputerC
3.25MIPS
2.1MIPS
hapter3
ComputerFunctionandInterconnection
3.1Processor-memory:
Datamaybetransferredfromprocessortomemoryorfrommemorytoprocessor.Processor-I/O:
DatamaybetransferredtoorfromaperipheraldevicebytransferringbetweentheprocessorandanI/Omodule.Dataprocessing:
Theprocessormayperformsomearithmeticorlogicoperationondata.Control:
Aninstructionmayspecifythatthesequenceofexecutionbealtered.
3.2Instructionaddresscalculation(iac):
Determinetheaddressofthenextinstructiontobeexecuted.Instructionfetch(if):
Readinstructionfromitsmemorylocationintotheprocessor.Instructionoperationdecoding(iod):
Analyzeinstructiontodeterminetypeofoperationtobeperformedandoperand(s)tobeused.Operandaddresscalculation(oac):
IftheoperationinvolvesreferencetoanoperandinmemoryoravailableviaI/O,thendeterminetheaddressoftheoperand.Operandfetch(of):
FetchtheoperandfrommemoryorreaditinfromI/O.Dataoperation(do):
Performtheoperationindicatedintheinstruction.Operandsto
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