UG2864HSWEG01用户手册.docx
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UG2864HSWEG01用户手册.docx
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UG2864HSWEG01用户手册
UG-2864HSWEG01
128X64
EvaluationKitUserGuide
Writer:
JamesWang
E-mail:
James_Wang@.tw
Version:
Preliminary
Contents
1.REVISIONHISTORY……………………………………………………………………………...3
2.EVKSchematic……………………………………………………………………………………..4
3.Symboldefine………………………………………………………………………………………5
4.TIMMINGCHARACTERISTICS…………………………...……………………………………...6
4.18080-SeriesMPUparallelInterface……………………………………………………………7
4.26800-SeriesMPUparallelInterface……………………………………………………………9
4.3SPIInterface……………………………………………………………………………………10
4.4IICInterface……………………………………………………………………………………11
5.EVKuseintroduction………………………………………………………………………..…14
6.PowerdownandPowerupSequence……………………………………………………...…17
7.HowtouseSSD1306module………………………………………………………………….18
7.1InitialStepFlow…………………………………………………………………………...18
7.2RDrecommendInitialCodeforIICInterface………………………………………19
7.2.1SubFunctionforIICInterface……………………………………………….20
1.REVISIONHISTORY
Date
Page
Contents
Version
2008/10/01
Preliminary
Preliminary0.0
2.EVKSchematic
*R1shouldbereplacedas560kΩwhilesupplying9VonVCCexternally.
3.Symboldefine
VCC:
Powersupplyforpaneldrivingvoltage.
VBAT:
Powersupplyforpaneldrivingvoltage(EmbeddedChargePump).VDD:
Powersupplyforcorelogicoperation.
VSS:
Thisisgroundpin.
BS0~BS2:
MUCbusinterfaceselectionpin(Page4Table7-1).CS:
Thispinischipselectinput(activeLOW).
RES:
Thispinisresetsignalinput(activeLOW).
D/C:
ThisisDATA/COMMANDcontrolpin.WhenitisPulledHIGH,thedataatD[0~7]istreatedasdata.WhenitispulledLOW,thedataatD[0~7]willbetransferredto
thecommandregister.
InI2Cmode,thispinactsasSA0forslaveaddressselect.
R/W:
Thisisread/writecontrolinputpinconnectingtotheMCUinterface.
Wheninterfacetoa6800-seriesmicroprocessor,ReadmodewillbecarriedoutwhenthispinispulledHIGHandwritemodewhenlow.
Wheninterfacetoan8080-microprocessor,thispinwhenbethedataWriteinput.
Whenserialinterfaceisselected,thispinmustbeconnectedtoVss.
E/RD:
Wheninterfacetoa6800-seriesmicroprocessor,thispinwillbeusedasthe
Enable(E)signal.
Wheninterfacetoan8080-microprocessor,thispinreceivesthe
Read(RD#)signal.
D0~D7:
Theseare8-bitbi-directionaldatabustobeconnectedtothemicroprocessor’sdatabus.
Whenserialinterfacemodeisselected,D0(SCLK)willbetheserialclockinput,D1(SDIN)willbetheserialdatainput,D2shouldbeleftopened.
WhenI2Cmodeisselected,D1(SDAin)ANDD2(SDAout)shouldbetiedtogether,D0(SCL)
istheI2Cclockinput
IREF:
Thisissegmentoutputcurrentreferencepin.VCOMH:
ThispinforCOMsignaldeselectedlevelvoltage.
AcapacitorshouldbeconnectedbetweenthispinandVSS.
VBAT:
ItshouldbeconnectedtoVDD(ChargePumpDISABLE)orcouldbeconnectedtoindividualpowervoltagesupply.
VBAT=3.4~4.2V.(ChargePumpENABLE)C1P/C1N:
Itshouldbeconnectedacapacitor.C2P/C2N:
Itshouldbeconnectedacapacitor.
VBREF:
ItshouldbeconnectedVSS.ItshouldbekeptNCifitisnotused.BS[2:
0]:
MCUbusinterfaceselectionpins.
IREF:
Thisissegmentoutputcurrentreferencepin.
AresistorshouldbeconnectedbetweenthispinandVSStomaintaintheIREF
currentat12.5uA.
FR:
ThispinoutputsRAMwritesynchronizationsignal.PropertimingbetweenMCUdatawritingandframedisplaytimingcanbeachievedtopreventtearingeffect.ItshouldbekeptNCifitisnotused.
CL:
Thisisexternalclockinputpin.
Wheninternalclockisenabled(i.e.HIGHinCLSpin),thispinisnotusedandshouldbeconnectedtoVSS.Wheninternalclockisdisabled(i.e.LOWinCLSpin),thispinistheexternalclocksourceinputpin.
CLS:
Thisisinternalclockenablepin.WhenitispulledHIGH(i.e.connecttoVDD),internalclockisenabled.WhenitispulledLOW,theinternalclockisdisabled;anexternalclocksourcemustbeconnectedtotheCLpinfornormaloperation.
RES#:
Thispinisresetsignalinput.WhenthepinispulledLOW,initializationofthechipisexecuted.KeepthispinHIGH(i.e.connecttoVDD)duringnormaloperation.
CS#:
Thispinisthechipselectinput.(ActiveLOW)
4.IICINTERFACESDESCRIPTIONS&TIMMINGCHARACTERISTICS
4.180-SeriesMPUparallelInterface
Figure180-SeriesMPUparallelInterfaceWriteTimingDiagram
Table180-SeriesMPUparallelInterfaceWriteTimingCharacteristics
Figure280-SeriesMPUparallelInterfaceReadTimingDiagram
Table280-SeriesMPUparallelInterfaceReadTimingCharacteristics
4.26800-SeriesMPUparallelInterface
Figure368-SeriesMPUparallelInterfaceWriteTimingDiagram
Table368-SeriesMPUparallelInterfaceWriteTimingCharacteristics
4.3SPIInterface
Figure4SerialperipheralinterfaceTimingDiagram
Table4SerialperipheralinterfaceTimingCharacteristics
4.4IICInterface
5.EVKuseintroduction
Figure1EVKPCBandOLEDModule
Figure2ThecombinationofthemoduleandEVK
TheSSD1306isCOGtypepackage,thattheconnectpadsareonthebottomofthemoduleconnector.WhenfinishedassembledthemoduleandEVK,thenpushthelockingpadtolockthemodule.SeetheFigure1andFigure2.
UsercanuseleadingwiretoconnectEVKwithcustomer’ssystem.TheexampleshowsasFigure3
Figure3EVKwithtestplatform
Note1:
Itistheinternalmostpositivevoltagesupply.Inthissampleisconnectedtopowersupply.
Note2:
Thoseareleadingwireconnecttocontrolboard.Those
aredatapin.(D0-D7)
Note3:
Thoseareleadingwireconnecttocontrolboard.Thosearecontrolpin.
(DC,CS,RD,WR,RES)
6.PowerdownandPowerupSequence
ToprotectOLEDpanelandextendthepanellifetime,thedriverICpowerup/downroutineshouldincludeadelayperiodbetweenhighvoltageandlowvoltagepowersourcesduringturnon/off.Suchthatpanelhasenoughtimetochargeupordischargebefore/afteroperation.
PowerupSequence:
1.PowerupVDD
2.SendDisplayoffcommand
3.DriverICInitialSetting
4.ClearScreen
5.PowerupVcc
6.Delay100ms
(whenVDDisstable)
7.SendDisplayoncommand
PowerdownSequence:
1.SendDisplayoffcommand
2.PowerdownVDDH
3.Delay100ms
(whenVccisreach0andpaneliscompletelydischarges)
4.PowerdownVDD
VCC
VDD
VSS/Ground
VCC
VDD
VSS/Ground
VDDon
VCCon
Displayoff
VCCoff
Displayon
VDDoff
7.HowtouseSSD1306module
7.1InitialStepFlow
Reset
DriverIC
RES=0
Delay10ms
RES=1
DriverIC
InitialCode
Suggestallregister
setagain
Displayon
ClearRAM
Start
Display
RDrecommendsInitialCode:
Internalsetting(Chargepump)
{
WRITE_COMMAND(0xae);//--turnoffoledpanelWRITE_COMMAND(0x00);//---setlowcolumnaddressWRITE_COMMAND(0x10);//---sethighcolumnaddressWRITE_COMMAND(0x40);//--setstartlineaddressWRITE_COMMAND(0x81);//--setcontrastcontrolregisterWRITE_COMMAND(0xcf);
WRITE_COMMAND(0xa1);//--setsegmentre-map95to0
WRITE_COMMAND(0xa6);//--setnormaldisplayWRITE_COMMAND(0xa8);//--setmultiplexratio(1to64)WRITE_COMMAND(0x3f);//--1/64dutyWRITE_COMMAND(0xd3);//-setdisplayoffsetWRITE_COMMAND(0x00);//-notoffset
WRITE_COMMAND(0xd5);//--setdisplayclockdivideratio/oscillatorfrequency
WRITE_COMMAND(0x80);//--setdivideratioWRITE_COMMAND(0xd9);//--setpre-chargeperiodWRITE_COMMAND(0xf1);
WRITE_COMMAND(0xda);//--setcompinshardwareconfiguration
WRITE_COMMAND(0x12);WRITE_COMMAND(0xdb);//--setvcomhWRITE_COMMAND(0x40);
WRITE_COMMAND(0x8d);//--setChargePumpenable/disableWRITE_COMMAND(0x14);//--set(0x10)disableWRITE_COMMAND(0xaf);//--turnonoledpanel
}
Externalsetting
{
WRITE_COMMAND(0xae);//--turnoffoledpanelWRITE_COMMAND(0x00);//---setlowcolumnaddressWRITE_COMMAND(0x10);//---sethighcolumnaddressWRITE_COMMAND(0x40);//--setstartlineaddressWRITE_COMMAND(0x81);//--setcontrastcontrolregisterWRITE_COMMAND(0x8f);
WRITE_COMMAND(0xa1);//--setsegmentre-map95to0
WRITE_COMMAND(0xa6);//--setnormaldisplayWRITE_COMMAND(0xa8);//--setmultiplexratio(1to64)WRITE_COMMAND(0x3f);//--1/64dutyWRITE_COMMAND(0xd3);//-setdisplayoffsetWRITE_COMMAND(0x00);//-notoffset
WRITE_COMMAND(0xd5);//--setdisplayclockdivideratio/oscillatorfrequency
WRITE_COMMAND(0x80);//--setdivideratioWRITE_COMMAND(0xd9);//--setpre-chargeperiodWRITE_COMMAND(0x22);
WRITE_COMMAND(0xda);//--setcompinshardwareconfiguration
WRITE_COMMAND(0x12);WRITE_COMMAND(0xdb);//--setvcomhWRITE_COMMAND(0x40);
WRITE_COMMAND(0x8d);//--setChargePumpenable/disableWRITE_COMMAND(0x10);//--set(0x14)EnableWRITE_COMMAND(0xaf);//--turnonoledpanel
}
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