洗衣机控制电路设计 EDA课程设计.docx
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洗衣机控制电路设计 EDA课程设计.docx
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洗衣机控制电路设计EDA课程设计
HUNANUNIVERSITY
数字电子技术
课程设计报告
设计课题:
洗衣机控制电路设计
学生姓名:
王建平
学生学号:
专业班级:
08级自动化1班
学院名称:
电气与信息工程学院
指导教师:
叶佳卓
一课程设计的目的:
1、能够全面巩固和应用“电子技术基础数字部分”课程中所学的基本理论和方法,并初步掌握小型数字系统设计的基本方法。
2、掌握VHDL语言编制小型模块的方法,并采用层次化设计。
3、培养电路设计能力,懂得理论设计与实物实现的有效结合。
4、掌握AltiumDesigner软件的应用。
二总体方案分析及选择:
洗衣机电路包含有总的控制模块,洗涤控制模块,洗涤记时模块,电动机控制模块以及LCD液晶板的动态显示模块.经过分析后,我们把前四个模块进行组合,把他们合成一个模块即:
总控制模块.他们之间的逻辑联结关系,是对数电课程的一个很好总结,也是自己对新知识(LCD液晶板的动态显示)学习理解运用能力的一个很好的提升机会。
三基本功能要求:
1要求设计制作一个普通功能洗衣机控制电路,使之能控制洗衣机的进水阀,排水阀,洗涤程序电机,甩干驱动装置等按预定程序工作.总体过程包括:
进水浸泡洗涤排水甩干五个过程.进水从电路启动开始.其中浸泡可供选择,洗涤时间可以预置,洗涤结束时发出铃声进行提示并自动切断电源.发生故障如:
缺水或进水超时排水超时甩干碰桶等时也可自动切断电源!
2根据洗衣机工作时不同的洗衣服数量,我们设计了三个档(duoxizhongxishaoxi)来对洗衣机的进水浸泡洗涤排水甩干的五个过程分别预置时间。
以此来区分洗衣机不同洗衣数量下的工作状态。
3用中小规模集成电路芯片或CPLD/FPGA设计符合上述任务要求的电路,并制作出能实际运行的装置.
4安装并调试电路,测试各部分电路功能或模型.
5演示并交验硬件装置.
下载实现图:
四总控制模块的生成程序
libraryieee;
useieee.std_logic_1164.all;
useieee.std_logic_arith.all;
useieee.std_logic_unsigned.all;
entitywasheris
port(
clk0,clk1,rst,alarm:
instd_logic;
-----clk0:
控制开关脉冲.clk1:
记时开关脉冲.Rst:
复位端.alarm报警输入端.-------
duoxi,zhongxi,shaoxi:
instd_Logic;
-----qiangxi:
强洗输入端。
zhongxi:
中洗输入端。
ruoxi:
弱洗输入端。
-------------
water_in,water_out,immersion,dry,z1,z2,voice,poweroff:
outstd_logic;
-----进水,出水,浸泡,甩干,洗涤,响铃,断电输出端-------
display_th,display_tl:
outstd_logic_vector(3downto0)
-------------------输出时间显示高位低位输出端-------------
);
endentitywasher;
architecturebehaveofwasheris
signaljs,js_ten:
std_logic;
signalim,im_ten:
std_logic;
signalwa,wa_ten:
std_logic;
signalwa1,wa2,pwf:
std_logic;
signalcs,cs_ten:
std_logic;
signaldr,dr_ten:
std_logic;
signalxl,xl_ten:
std_logic;
signaljs_dh,js_dl:
std_logic_vector(3downto0);
signalim_dh,im_dl:
std_logic_vector(3downto0);
signalwa_dh,wa_dl:
std_logic_vector(3downto0);
signalcs_dh,cs_dl:
std_logic_vector(3downto0);
signaldr_dh,dr_dl:
std_logic_vector(3downto0);
signalxl_dh,xl_dl:
std_logic_vector(3downto0);
signaldis_th,dis_tl:
std_logic_vector(3downto0);
signalwater_inh,water_inl,im_th,im_tl,wash_th:
std_logic_vector(3downto0);
signalwash_tl,water_outh,water_outl,dry_th,dry_tl:
std_logic_vector(3downto0);
begin
-----------------------控制:
控制器件实现洗衣机的功能:
进水->浸水->洗涤->出水->甩干
control:
process(clk0,rst,alarm,duoxi,zhongxi,shaoxi)
variablen:
integer;
begin
ifduoxi='1'andzhongxi='0'andshaoxi='0'then
water_inh<="0001";
water_inl<="0010";
im_th<="1001";
im_tl<="0000";
wash_th<="1001";
wash_tl<="0000";
water_outh<="0001";
water_outl<="0010";
dry_th<="1001";
dry_tl<="0000";
elsifduoxi='0'andzhongxi='1'andshaoxi='0'then
water_inh<="0000";
water_inl<="0110";
im_th<="0110";
im_tl<="0000";
wash_th<="0110";
wash_tl<="0000";
water_outh<="0000";
water_outl<="0110";
dry_th<="0110";
dry_tl<="0000";
elsifduoxi='0'andzhongxi='0'andshaoxi='1'then
water_inh<="0000";
water_inl<="0110";
im_th<="0011";
im_tl<="0000";
wash_th<="0011";
wash_tl<="0000";
water_outh<="0000";
water_outl<="0110";
dry_th<="0011";
dry_tl<="0000";
else
water_inh<="0000";
water_inl<="0000";
im_th<="0000";
im_tl<="0000";
wash_th<="0000";
wash_tl<="0000";
water_outh<="0000";
water_outl<="0000";
dry_th<="0000";
dry_tl<="0000";
endif;
ifalarm='1'then
pwf<='1';
else
ifrst='1'then
n:
=0;
im_ten<='0';
js_ten<='0';
wa_ten<='0';
cs_ten<='0';
dr_ten<='0';
xl_ten<='0';
pwf<='0';
elsifclk0='1'andclk0'eventthen
ifn=0then
ifwater_inh="0000"andwater_inl="0000"then
n:
=1;
else
js_ten<='1';
ifjs='1'then
n:
=1;
endif;
endif;
elsifjs='0'andn=1then
ifim_th="0000"andim_tl="0000"then
n:
=2;
else
im_ten<='1';
ifim='1'then
n:
=2;
endif;
endif;
elsifim='0'andn=2then
ifwash_th="0000"andwash_tl="0000"then
n:
=3;
else
wa_ten<='1';
ifwa='1'then
n:
=3;
endif;
endif;
elsifwa='0'andn=3then
ifwater_outh="0000"andwater_outl="0000"then
n:
=4;
else
cs_ten<='1';
ifcs='1'then
n:
=4;
endif;
endif;
elsifcs='0'andn=4then
ifdry_th="0000"anddry_tl="0000"then
n:
=5;
else
dr_ten<='1';
ifdr='1'then
n:
=5;
endif;
endif;
elsifdr='0'andn=5then
xl_ten<='1';
ifxl='1'then
n:
=6;
endif;
elsifxl='0'andn=6then
pwf<='1';
endif;
endif;
endif;
endprocess;
-----------------------------记时-----------------------------
------------------进水记时--------------------------
js_jishiqi:
process(clk1,js_ten,water_inh,water_inl)
begin
ifjs_ten='0'then
js_dh<=water_inh;
js_dl<=water_inl;
js<='0';
elsifclk1='1'andclk1'eventthen
ifjs_dh="0000"andjs_dl="0000"then
js<='0';
else
js<='1';
ifjs_dl="0000"then
js_dl<="1001";
js_dh<=js_dh-1;
else
js_dl<=js_dl-1;
endif;
endif;
endif;
endprocess;
-------------浸泡记时-----------------------
im_jishiqi:
process(clk1,im_ten,im_th,im_tl)
begin
ifim_ten='0'then
im_dh<=im_th;
im_dl<=im_tl;
im<='0';
elsifclk1='1'andclk1'eventthen
ifim_dh="0000"andim_dl="0000"then
im<='0';
else
im<='1';
ifim_dl="0000"then
im_dl<="1001";
im_dh<=im_dh-1;
else
im_dl<=im_dl-1;
endif;
endif;
endif;
endprocess;
-----------------洗涤记时----------------------
wa_jishiqi:
process(clk1,wa_ten,wash_th,wash_tl)
variablem:
integer;
begin
ifwa_ten='0'then
wa_dh<=wash_th;
wa_dl<=wash_tl;
wa<='0';
wa1<='0';
wa2<='0';
m:
=0;
elsifclk1='1'andclk1'eventthen
ifwa_dh="0000"andwa_dl="0000"then
wa<='0';
wa1<='0';
wa2<='0';
else
wa<='1';
ifm=0then
wa1<='1';
wa2<='1';
elsifm=10then
wa1<='0';
wa2<='1';
elsifm=13then
wa1<='1';
wa2<='0';
elsifm=23then
wa1<='0';
wa2<='0';
elsifm=26then
m:
=0;
wa1<='1';
wa2<='1';
endif;
m:
=m+1;
ifwa_dl="0000"then
wa_dl<="1001";
wa_dh<=wa_dh-1;
else
wa_dl<=wa_dl-1;
endif;
endif;
endif;
endprocess;
--------------出水记时---------------------------
cs_jishiqi:
process(clk1,cs_ten,water_outh,water_outl)
begin
ifcs_ten='0'then
cs_dh<=water_outh;
cs_dl<=water_outl;
cs<='0';
elsifclk1='1'andclk1'eventthen
ifcs_dh="0000"andcs_dl="0000"then
cs<='0';
else
cs<='1';
ifcs_dl="0000"then
cs_dl<="1001";
cs_dh<=cs_dh-1;
else
cs_dl<=cs_dl-1;
endif;
endif;
endif;
endprocess;
--------------甩干记时-----------------------
dr_jishiqi:
process(clk1,dr_ten,dry_th,dry_tl)
begin
ifdr_ten='0'then
dr_dh<=dry_th;
dr_dl<=dry_tl;
dr<='0';
elsifclk1='1'andclk1'eventthen
ifdr_dh="0000"anddr_dl="0000"then
dr<='0';
else
dr<='1';
ifdr_dl="0000"then
dr_dl<="1001";
dr_dh<=dr_dh-1;
else
dr_dl<=dr_dl-1;
endif;
endif;
endif;
endprocess;
------------------响铃记时----------------------
xl_jishiqi:
process(clk1,xl_ten)
begin
ifxl_ten='0'then
xl_dh<="0010";
xl_dl<="0000";
xl<='0';
elsifclk1='1'andclk1'eventthen
ifxl_dh="0000"andxl_dl="0000"then
xl<='0';
else
xl<='1';
ifxl_dl="0000"then
xl_dl<="1001";
xl_dh<=xl_dh-1;
else
xl_dl<=xl_dl-1;
endif;
endif;
endif;
endprocess;
----------------------------显示时间--------------------------
xianshishijian:
process(clk1,js_ten,im_ten,wa_ten,cs_ten,dr_ten,xl_ten)
begin
ifjs_ten='1'andim_ten='0'andwa_ten='0'andcs_ten='0'anddr_ten='0'andxl_ten='0'then
ifclk1='1'andclk1'eventthen
dis_th<=js_dh;
dis_tl<=js_dl;
endif;
elsifim_ten='1'andwa_ten='0'andcs_ten='0'anddr_ten='0'andxl_ten='0'then
ifclk1='1'andclk1'eventthen
dis_th<=im_dh;
dis_tl<=im_dl;
endif;
elsifwa_ten='1'andcs_ten='0'anddr_ten='0'andxl_ten='0'then
ifclk1='1'andclk1'eventthen
dis_th<=wa_dh;
dis_tl<=wa_dl;
endif;
elsifcs_ten='1'anddr_ten='0'andxl_ten='0'then
ifclk1='1'andclk1'eventthen
dis_th<=cs_dh;
dis_tl<=cs_dl;
endif;
elsifdr_ten='1'andxl_ten='0'then
ifclk1='1'andclk1'eventthen
dis_th<=dr_dh;
dis_tl<=dr_dl;
endif;
elsifxl_ten='1'then
ifclk1='1'andclk1'eventthen
dis_th<=xl_dh;
dis_tl<=xl_dl;
endif;
endif;
endprocess;
----------------------------输出-----------------------------
output:
process(dis_th,dis_tl,im,js,cs,dr,wa1,wa2,xl,pwf)
begin
display_th<=dis_th;
display_tl<=dis_tl;
immersion<=im;
water_in<=js;
water_out<=cs;
dry<=dr;
z1<=wa1;
z2<=wa2;
voice<=xl;
poweroff<=pwf;
endprocess;
endbehave;
测试文件:
------------------------------------------------------------
--VHDLTestbenchforwasher
--2010112621484
--Createdby"EditVHDL"
--"Copyright(c)2002AltiumLimited"
------------------------------------------------------------
LibraryIEEE;
UseIEEE.std_logic_1164.all;
UseIEEE.std_logic_textio.all;
UseSTD.textio.all;
------------------------------------------------------------
------------------------------------------------------------
entityTestwasheris
endTestwasher;
------------------------------------------------------------
------------------------------------------------------------
architecturestimulusofTestwasheris
fileRESULTS:
TEXTopenWRITE_MODEis"results.txt";
procedureWRITE_RESULTS(
alarm:
std_logic;
clk0:
std_logic;
clk1:
std_logic;
display_th:
std_logic_vector(3downto0);
display_tl:
std_logic_vector(3downto0);
dry:
std_logic;
duoxi:
std_logic;
immersion:
std_logic;
poweroff:
std_logic;
rst:
std_log
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