微机原理课件ch11英文.pptx
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微机原理课件ch11英文.pptx
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,Instructor:
Dr.AlexYu,IntroductiontoI/OInterfaceI/OPortAddressDecodingTheProgrammablePeripheralInterface8254ProgrammableIntervalTimer16550ProgrammableCommunicationsInterfaceA/DandD/AConverters,8/23/2019,第2页,INandOUTtransferdatabetweenanI/Odeviceandthemicroprocessorsaccumulator(AL,AXorEAX).TheI/Oaddressisstoredin:
8/23/2019,第3页,RegisterDXasa16-bitI/Oaddress(variableaddressing).Thebyte,p8,immediatelyfollowingtheopcode(fixedaddress).INAL,19H;8-bitsaresavedtoALfromI/Oport19H.INEAX,DX;32-bitsaresavedtoEAX.OUTDX,EAX;32-bitsarewrittentoportDXfromEAX.OUT19H,AX;16-bitsarewrittentoI/Oport0019H.Only16-bits(A0toA15)aredecoded.AddressconnectionsaboveA15areundefinedforI/Oinstructions.INSandOUTStransfertoI/OdevicesusingES:
DIandDS:
SI,respectively.,8/23/2019,第4页,8/23/2019,第5页,8/23/2019,第6页,8/23/2019,第7页,I/Odevicesaretypicallyslowerthanthemicroprocessor.HandshakingisusedtosynchronizeI/Owiththemicroprocessor.,8/23/2019,第8页,Adeviceindicatesthatitisreadyforacommandordata(throughsomeI/Opinorport).Theprocessorissuesacommandtothedevice,andthedeviceindicatesitisbusy(notready).TheI/Odevicefinishesitstaskandindicatesareadycondition,andthecyclecontinues.Therearetwobasicmechanismsfortheprocessortoserviceadevice.Polling:
Processorinitiated.Deviceindicatesitisreadybysettingsomestatusbitandtheprocessorperiodicallychecksit.Interrupts:
Deviceinitiated.Theactofsettingastatusbitcausesaninterrupt,andtheprocessorcallsanISRtoservicethedevice.Example11-1(pp368),TheterminalcharacteristicsoftheprocessormustbematchedtothoseoftheI/Odevices.InputDevices:
TTL(0.0V-0.8Vlowand2.0-5.0Vhigh)orcompatible.Switch-based;usuallyeitheropenorconnected.Thesemustbeconditionedbeforetheycanbeusedproperly.Forexample,tomakeasimple(single-pole,single-throw)toggleswitchTTLcompatible:
Thisensuresthattheoutputisheldateither0orlogic1atalltimes(itneverfloats).,8/23/2019,第9页,InputDevices:
Mechanicalswitchesphysicallybouncewhentheyareclosed(causingthemtomomentarilyopenafterbeingclosed).ThiscancauseaproblemiftheyareusedasaclockingTsiwgnoaal.synchronousflip-flopsolutionsaregivenbelow:
Thebasicideaisthattheseflip-flopsstorethevalueseveniftheD/D#nodesbothfloat.,8/23/2019,第10页,OutputDevices:
Interfacinganoutputdevicerequiresmatchingthevoltageandcurrentrelationshipsofthedevicesandprocessor.RememberthatthestandardoutputlevelsofTTLcompatibledevicesare0.0to0.4Vforlogic0and2.4Vto5.0Vforlogic1.Thecurrentlevelsare0.0to2.0mA(logic0)and0.0to400uA(logic1).,8/23/2019,8/23/2019第12页,Example11-4,8/23/2019,第13页,Outputdevicescanbe16-bitinwhichcaseBHEisnotneeded.Inputdevicescanbe8-bitor16-bit.,Notethatinsteadoflatches,highimpedancebuffers(74ALS244)areusedinthesecases.32-bitportsarebecomingmorepopularbecauseofPCIbusprimarily.TheEISAandVESAlocalbusarealso32-bitbuses.Forthe64-bitdatabusesofthePentium,theI/Oportscanappearinanyofthe8banks.However,only32-bittransfersaresupported,asthereareno64-bittransferinstructions.,8/23/2019,第14页,The82C55isapopularinterfacingcomponent,thatcaninterfaceanyTTL-compatibleI/Odevicetothemicroprocessor.,8/23/2019,第15页,ItisusedtointerfacetothekeyboardandaparallelprinterportinPCs(usuallyaspartofanintegratedchipset).Requiresinsertionofwaitstatesifusedwithamicroprocessorusinghigherthatan8MHzclock.PPIhas24pinsforI/Othatareprogrammableingroupsof12pinsandhasthreedistinctmodesofoperation.InthePC,an82C55oritsequivalentisdecodedatI/Oports60H-63H.,8/23/2019,第16页,8/23/2019,第17页,8/23/2019,第18页,Example11-8,9,10,8/23/2019,第19页,Mode0operationcausesthe82C55tofunctionasabufferedinputdeviceorasalatchedoutputdevice.Inpreviousexample,bothportsAandBareprogrammedas(mode0)simplelatchedoutputports.,8/23/2019,第20页,PortAprovidesthesegmentdatainputstodisplayandportBprovidesameansofselectingonedisplaypositionatatime.Differentvaluesaredisplayedineachdigitviafasttimemultiplexing.Thevaluesfortheresistorsandthetypeoftransistorsusedaredeterminedusingthecurrentrequirements(seetextforTdextatbilos)o.khastheassemblycodefragmentdemonstratingitsuse.ExamplesofconnectingLCDdisplaysandsteppermotorsarealsogiven.,Threeindependent16-bitprogrammablecounters(timers).EachcapableinofcountinginbinaryorBCDwithamaximumfrequencyof10MHz.Usedforcontrollingreal-timeeventssuchasreal-timeclock,eventscounter,andmotorspeedanddirectioncontrol.,8/23/2019,第21页,8/23/2019,第22页,A1,A0Theaddressinputsselectoneofthefourinternalregisterswiththe8254asfollows:
CLKTheclockinputisthetimingsourceforeachoftheinternal,counters.,CSChipSelectenablesthe8254forprogramming,andreading,andwriting.,GThegateinputcontrolstheoperationofthecounterinsome,modes.,OUTAcounteroutputiswherethewave-formgeneratedbythe,timerisavailable.,RD/WRRead/Writecausesdatatoberead/writtenfromthe,8254andoftenconnectstotheIORC/IOWC.,8/23/2019,第23页,Eachcounterisindividuallyprogrammedbywritingacontrolword,followedbytheinitialcount.Thecontrolwordallowstheprogrammertoselectthecounter,modelofoperation,binaryorBCDcountandtypeofoperation(read/write).,8/23/2019,第24页,Eachcountermaybeprogrammedwithacountof1toFFFFH.,8/23/2019,第25页,Minimumcountis1allmodesexcept2and3withminimumcountof2.Eachcounterhasaprogramcontrolwordusedtoselectthewaythecounteroperates.Iftwobytesareprogrammed,thenthefirstbyte(LSB)stopsthecount,andthesecondbyte(MSB)startsthecounterwiththenewcount.Thereare6modesofoperationforeachcounter:
8/23/2019,第26页,8/23/2019,第27页,端口地80址83H,分频器,8/23/2019,第28页,程序如下:
MOVOUT,AL,01110000B83H,AL,MOVOUT,MOVOUT,;1#计数器,二进制计数,方式0,高低8位均写AL,09H81H,AL;写入低8位AL,3DH81H,AL;写入高8位,8/23/2019,第29页,8/23/2019,第30页,自动门控制有人到时,光传感器发信号给GATE1,8253开始作10s计时,并将门打开。
若10s内无人过来,定时到时,门关上;若有人过来,门将继续打开,并延时10s后关闭。
设fCLK1=100HZ,计算:
fCLK1/C=fOUT=1/TOUT1C=fCLK1TOUT1=10010=1000,初始化程序:
MOVOUT,MOVOUT,AL,01100011B83H,AL;1#计数器,方式1工作,BCD计数,只写高8位。
AL,10H81H,AL,;高8位计数值为00010000BCD,低8位计数值为00000000BCD,光传感器,100HZ,8/23/2019,第31页,8/23/2019第32页,8/23/2019,第33页,设fCLK1=50HZ,初始化程序:
MOVOUT,AL,01010100B83H,AL,;1#计数器,方式2工作,二进制计数,只写低8位。
MOVOUT,AL,0AH81H,AL,;计数值为10,高8位自动清零fCLK1/C=fout1=1/(9+1)TCLK1=fCLK1/10C=10=0AH,9191,8/23/2019第34页,8/23/2019,第35页,100KHZ,单位:
ms,计算:
fCLK1/C3=1/100msC3=1001030.1=10000,初始化程序:
MOVOUT,MOVOUTOUT,AL,01110111B83H,AL;1#计数器,方式3工作,BCD计数,高低8位均写。
AL,00H81H,AL81H,AL,;高8位计数值为00000000BCD,低8位计数值为00000000BCD即计数值为10000。
050100,8/23/2019第36页,8/23/2019,第37页,8/23/2019,第38页,8/23/2019,第39页,Auniversalasynchronousreceiver/transmitter(UART).Operationspeed:
0-1.5MBaud(Baudis#ofbitstransmitted/sec,includingstart,stop,dataandparity).Includes:
AprogrammableBaudrategenerator.SeparateFIFObuffersforinputandoutputdata(16byteseach).Asynchronousserialdata:
Transmittedandreceivedwithoutaclockortimingsignal.,8/23/2019,第40页,8/23/2019,第41页,A0,A1andA2:
Selectaninternalregisterforprogramminganddatatransfer.,BAUDOUT:
ClocksignalfromBaudrategeneratorintransmitter.CS0,CS1,CS2:
Chipselects,8/23/2019,第42页,D7-D0:
Thedatabuspinsareconnectedtothemicroprocessordatabus.INTR:
Interruptrequestisanoutputtothemicroprocessor-usedtorequestaninterrupt.,8/23/2019,第43页,ReceivererrorDatareceivedTransmitbufferemptyMR:
Masterreset-connecttosystemRESETRCLK:
Receiverclock-clockinputtothereceiversectionoftheUART.Always16XthedesiredreceiverBaudrate.,RD,RD:
Readinputs(eithercanbeused)-causedatatobereadfromtheregistergivenbytheaddressinputs.SIN,SOUT:
Serialdatapins,inandout.WR,WR:
Write(eithercanbeused)-connectstomicrowritesignaltotransfercommandsanddatato16550.XIN,XOUT:
Mainclockconnections-acrystaloscillatorcanbeused.,8/23/2019,第44页,Twophases:
Initialization,operation.Initialization:
AfterRESET,thelinecontrolregisterandbaudrategeneratorneedtobeprogrammed.Linecontrolregistersetsthe#ofdatabits,#ofstopbitsandtheparity.Addressedatlocation011.,Stopbits:
S=1,1.5stopbitsusedfor5databits,2usedfor6,7or8.,8/23/2019,第45页,ST,PandPEusedtosendevenoroddparity,tosendnoparityortosenda1ora0intheparitybitpositionforalldata.,Noparity,both0-usedforinternetconnections.SB=1causesabreaktobetransmittedonSOUT.Abreakisatleasttwoframeof0data.DL=1enablesprogrammingofthebaudratedivisor.,8/23/2019,第46页,Baudrategeneratorisprogrammedwithadivisorthatsetsbaudrateoftransmitter.Baudrategeneratorisprogrammedat000and001.,Port000usedtoholdleastsignificantbyte,001mostValsuigenuifsiecdandt.ependsonexternalclock/crystalfrequency.For18.432MHzcrystal,10,473gives110bandrate,30gives38,400baud.Note,numberprogrammedgeneratesaclock(=16XthedesiredBaudrate).Last,theFIFOcontrolregistermustbeprogrammedat010.,8/23/2019,第47页,Statuslineregistergivesinformationabouterrorconditionsandstateofthetransmitterandreceiver.,Thisregisterneedstobetestedinsoftwareroutinesdesignedtousethe16550totransmit/receivedata.SupposeaprogramwantstosenddataoutSOUT.ItneedstopooltheTHbittodetermineiftransmitterisreadytoreceivedata.Toreceiveinformation,theDRbitistested.,8/23/2019,第48页,Itisalsoagoodideatocheckforerrors.Parityerror:
Receiveddatahaswrongerrortransmissionbitflipduetonoise.,8/23/2019,第49页,Framingerror:
Startandstopbitsnotintheirproperplaces.Thisusuallyresultsifthereceiverisreceiv
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