VHDL语言设计数字系统的外文翻译.docx
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VHDL语言设计数字系统的外文翻译.docx
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VHDL语言设计数字系统的外文翻译
DESIGNINGADIGITALSYSTEMWITHVHDL
ValentinaStoyanovaKukenska
Abstract:
InthispaperadigitalsystemdesigningwithVHDLispresented.Hereareexposedsequentiallyallthephasesoftheverydigitalsystem'sdesigning.Themainmethodsarealsoonshowhere.Theprojectdescriptions’typesarepresented.ThestressisputontheuseofVHDLforsynthesisofstructuralandbehavioralmodels.
ForcreatingtheprojectofthechosendigitalsystemanintegratedsystemWebPackwasused,aswellasModelSImXEIIforthemodel'ssimulation.
Keywords:
Design,VHDL,digitalsystems,model,WebPack
1.INTRODUCTION
Thedigitalsystemsarecomplexones,consistingoflotsofcomponents.Asfarastheautomateddesignofsuchsystemsisconcerned,methodsfordesigningtimereducingandlimitingthecomplexityofthetaskaresoughtoutandapplied.Amethodofthekindisconnectedwiththedecompositionandhierarchyprinciples.Thedecompositionofthesystemsisrealizedinaway,whichdifferentiatesfunctionallyindependentmodules.
Adigitalsystemcanbedescribedasamodulewithinputsand/oroutputs.Theelectricalvaluesontheoutputsaresomefunctionofthevaluesontheinputs.
Onewayofdescribingthefunctionofamoduleistodescribehowitiscomposedofsub-modules.Eachofthesub-modulesisaninstanceofsomeentity,andtheportsoftheinstancesareconnectedusingsignals.Thiskindofdescriptioniscalledastructuraldescription.
Inmanycases,itisnotappropriatetodescribeamodulestructurally.Onesuchcaseisamodule,whichisatthebottomofthehierarchyofsomeotherstructuraldescription.Forexample,ifyouaredesigningasystemusingICpackagesboughtfromanICshop,youdonotneedtodescribetheinternalstructureofanIC.Insuchcases,adescriptionofthefunctionperformedbythemoduleisrequired,withoutreferencetoitsactualinternalstructure.Suchadescriptioniscalledafunctionalorbehavioraldescription.
Usually,forstructuralandbehavioraldescription,eitherVerilogorVHDLisused.InthispaperadesigningwithVHDLispresented.Hereareexposedsequentiallyallthephasesoftheverydigitalsystem'sdesigning.Themainmethodsarealsoonshowhere.Theprojectdescriptions’typesarepresented.ThestressisputontheuseofVHDLforsynthesisofstructuralandbehavioralmodels.HerearepresentedseveralVHDLmodelsofcomputersystems’components.
2.METHODSANDSTAGESINDIGITALSYSTEMS’DESIGN
Indigitalsystems’design,aswellasdesignofcomplexsystems,acoupleofmethodsareinuse:
top-downdesigning;
up-downdesigning.
Intop-downdesigningthebuildingupofthesystemisusuallystartedfrombelowinuprightdirectionthroughelaboratingtheelementblocks’schemes,assembledlatertoformthewholeproduct.
Anadvantageofthismethodistheuseofrepresentationonfunctionalblocklevelandthelower,thestructurallevel,isaddressedonlyduringtheerrorchecksimulationswithintheproject.
Theup-downdesigningstartswithaspecificationonthehighestlevel.Afterthat,theprojectisbeingdecomposedintofunctionalblocksandtherequirementsfortheincomeandoutcometimeproportionsarespecified.Thefunctionalmodelsaredescribedthroughbehavioralmodelsorbymodelsonregisterlevelsandaresubsequentlysimulated.
Someoftheadvantagesofthemethodsare:
аneasierexecutionofthetask’sspecifications;
иtallowsaprojects’checkonsystemlevel,withouttacklingthe
structuraldetails;
Theproject’scheckisdone,withnoregardtothetechnologyofits
realization.Thatallowsthatthechoiceoftechnologybemadeonalaterstageofthedesigningproject.
Themosteffectiveup-downdesigningmethodistheuseofanabstractdescriptionoftheschemeandthesequentialdetailsspecifyingofthedifferenthierarchylevels’description.
Thedigitalsystems’designgoesthroughthenextstages:
Specification;
Functional(electrical)designing;
Physicaldesigning;
Manufacturing;
Testing.
Throughspecificationtheproductparameters,necessaryforitsproperdestination,aredetermined.
Throughthefunctional(electrical)designing,theelectricalscheme,responsibleforthefunctionsandparametersoftheproduct,intermsofthespecification,iselaborated.
Thebehavioralstageservesasadescriptionfortheschemeasasystem,anditsentriesandexitsaremarkedout.Inmostofthecases,VHDLmodelsareused.
TheFunctional(electrical)designingdealswithmainfunctionalblocks’elaboration.UsuallyadetailedVHDLdescriptionofthefunctionalblockismadeandbeingcheckedbyaVHDLsimulation.
Withtheincreasingcomplexityoftheprojects,fortheelaborationonstructurallevel,thetechniqueofsynthesisisapplied.ItallowsthattheschemewithlogicalelementsbesynthesizedfromaVHDLdescription.Throughlogical
descriptiondetailssuchascharging,elements’delay,arespecifiedandcrucialmethodsandproblemswithtimescatteringofsignalsaredefined.
ThePhysicaldesigningstagesstronglydependontechnology.Thecommontaskisconcernedwiththedeployingofthelogicalelementsanddefining(tracing)theirinterrelations.
ProvidedthatfortheproductrealizationPLD,CPLDorFPGAchipsareused,thentheresultofthephysicaldesigningrepresentsaconfigurationfilefordesigningthechosendevice’sresources.
Thetestingoftheprojectrepresentsanumberofprocedures,usedbydesigners,toprovide:
adequacybetweenprojectandspecification;
theexecutionoftheprojectintermsofthechosentechnology.
Thedesigningprocessisusuallyiterative,includingpre-designingofgivenparts,untiltheintendedindicatorsareobtained.
Forthetasksoftestinginelectricaldesigning(thefunctionalityoftheproductanditselectricalparameters),simulationsareused.
Thesimulationonbehavioralleveldefineshowtheproductwillrun,beforeitsactualcompoundingblocksarechosen.Forworkingoutofthebehavioralmodels,thehardwaredescriptionlanguagesareused(VHDL,Verilogandothers).
Throughsimulation,onalogicalprimitiveslevel,theschemesarebuiltupwithbasiclogicalelements“AND-NO”,“OR-NO”,invertorsandtriggersandarebeingsimulatedinordertofindoutirrelevanceswiththeirexpectedacting.
Infunctionaltesting,thedelaysarenotconcernedortheyaresupposedsimilarforalllogicalelements.
Erroridentificationafterthephysicaldesign
Aftertopology’sfinalelaborationaremadethenextprocedures:
checkoutofthetechnormsthroughoutmanufacturing;checkoutfortheproject’sauthenticity.
Thetechnormsformanufacturingarespecificforeachtechnologicalprocess.Theauthenticityverificationoftheprojectaimstoguaranteetheproduct’s
properworking.Itincludes:
findingouttheinterconnectionofthescheme;findingouttheparasitecomponentsofthetopology.
3.TYPESOFDESIGNDESCRIPTIONS
Throughthedesigningprocess,threetypesofdesigndescriptionareinuse:
behavioral;
structural;
physical.
Thebehavioraldescriptiontacklesthesystemasifitwereakindof“blackbox”withitsentrancesandexits,withnoregardtoitsstructure.Theaimistoignoretheredundantdetailsandtoconcentrateonthespecificationofthenecessaryforthefunctions,whicharetobedonebytheproduct.Onthisstage,languagesfortheapparatuspartareusedHDL(HardwareDescriptionLanguages)-VHDL,Verilogandothers.
Thestructuraldescriptiondefinesthewaythatthesystemistobebuiltup.Here,thesystem’sstructure,madeofblocksandtheirinterrelations,istackled.Thesubsystems,whicharetoprovideitsfunctionalexecution,aswellastheirdetaileddescriptionforanalysisoftheoperationalspeed,chargingandsoon,aredefined.Thestructuraldescriptioncanbepresentedbylanguagesforthedescriptionofthehardware,aswellasbyelectricalschemes.
Thedesignprocessisconnectedwiththetransformationsofthesystems’descriptionsandtheirsequentialdetailsspecification.Decompositionfrombehavioraltostructuraldescriptioncanberealizedonanumberoflevelsinahierarchy.Fromthehighesttothelowest,theselevelscanbeoutlinedasitfollows:
systemlevel;
functionallevel;
logicallevel;
schemelevel.
Onthehighestsystemlevel,thesystem’sbehaviorisrepresentedbyalgorithmsthatdescribeitsfunctions.Inorderthatthesefunctionsbeexecuted,thearchitectureofthesystemisworkedout,includingmicroprocessors,memories,mainboardsandotherstructuralcomponents.
Onthelowerlevel,thesystem’sbehaviorisdescribedbyBoliviaequations.Fortheirexecution,logicalelementsandtriggersareused.
4.USEOFVHDLFORSYNTHESISOFSTRUCTURALANDBEHAVIORALMODELS
VHDLisaHardwareDescriptionLanguagefordescribingdigitalsystem[2].VHDLisdesignedtofullanumberofneedsinthedesignprocess.
VHDLcontainsanumberoffacilitiesformodifyingthestateofobjectsandcontrollingtheflowofexecutionofmodules.
InVHDL,anentityissuchamodulewhichmaybeusedasacomponentinadesign,orwhichmaybethetop-levelmoduleofthedesign.Theentitydeclarativepartmaybeusedtodeclareitems,whicharetobeusedintheimplementationoftheentity.
Onceanentityhashaditsinterfacespecifiedinanentitydeclaration,oneormoreimplementationsoftheentitycanbedescribedinarchitecturebodies.Eacharchitecturebodycandescribeadifferentviewoftheentity.
Thedeclarationsinthearchitecturebodydefineitemsthatwillbeusedtoconstructthedesigndescription.
Signalsareusedtoconnectsubmodulesinadesign.Thesubmodule
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