1、 a simple, efficient and flexibleSummaryDirect digital frequency synthesis （DDS） technology for the generation and regulation of high-quality waveforms, widely used in medical, industrial, instrumentation, communications, defense and many other areas. This article will briefly describe the technolog
2、y, on its strengths and weaknesses, examine some application examples, and also introduced some new products that contribute to the promotionIntroductionA key requirement in many industries is an exact production, easy operation and quick change of different frequencies, different types of waveforms
3、. Whether it is broadband transceiver requires low phase noise and excellent spurious-free dynamic performance of agile frequency source, or for industrial measurement and control system needs a stable frequency excitation, fast, easy and economical to produce adjustable waveform while maintaining p
4、hase continuity capabilities are critical to a design standard, which is what the advantages of direct digital frequency synthesis.Frequency synthesis taskThe growing congestion of the spectrum, coupled with lower power consumption, quality of never-ending demand for higher measuring equipment, thes
5、e factors require the use of the new frequency range, requires a better use of existing frequency range. A result, the search for better control, in most cases, by means of frequency synthesizer for frequency generation. These devices use a given frequency, fC of to generate a target frequency （and
6、phase） fOUT the general relationship can be simply expressed as:fOUT = x fCAmong them, the scale factor x, sometimes known as the normalized frequency.The equation is usually gradual approximation of the real number algorithms. When the scale factor is a rational number, two relatively prime numbers
7、 （output frequency and reference frequency） than the harmonic. However, in most cases, x may belong to a broader set of real numbers, the approximation process is within the acceptable range will be truncatedDirect Digital Frequency SynthesizerThe frequency synthesizer a practical way to achieve is
8、the direct digital frequency synthesis （of DDFS）, usually referred to as direct digital synthesis （DDS）. This technique using digital data processing to generate a frequency and phase adjustable output, the output anda fixed frequency reference clock source fC. related. DDS architecture, the referen
9、ce or the system clock frequency divided by a scale factor to produce the desired frequency, the scale factor is controlled by the binary tuning word programmable.In short, direct digital frequency synthesizer to convert a bunch of clock pulses into an analog waveform, usually a sine wave, triangle
10、wave or square wave. Shown in Figure 1, its main parts: the phase accumulator （to produce the output waveform phase angle data）, relative to digital converter, （above the phase data is converted to the instantaneous output amplitude data）, and digital-to-analog converter （DAC） （the magnitude of data
11、 into a sampled analog data points）Figure 1.DDS function of the system block diagram.For the sine wave output, relative to digital converter is usually a sine lookup table （Figure 2）. Phase accumulator unit count N a relative to the frequency of fC, according to the following equation:The number of
12、pulses of the fC:M is the resolution of the tuning word （24-48） N corresponds to the smallest increment of phase change of the phase accumulator output wordFigure 2. Typical DDS architecture and signal path （with DACs）.Changing N will immediately change the output phase and frequency, so the system
13、has its own continuous phase characteristics, which is one of the key attributes of many applications. No loop settling time, which is different from the analog system, such as phase-locked loops （PLLs）. DAC is usually a high-performance circuit, designed specifically for the DDS core （phase accumul
14、ator and phase amplitude converter）. In most cases, the results of the device （usually single-chip） is generally referred to as the pure DDS or the C-DDS.Actual DDS devices are generally multiple registers, in order to achieve a different frequency and phase modulation scheme. Such as phase register
15、, their storage phase of increase in the output phase of the phase accumulator. In this way, the corresponding delay output sine wave phase in a phase tuning word. This is useful for phase modulation applications for communication systems. The resolution of the adder circuit determines the number of
16、 bits of the phase tuning word, therefore, also decided to delay the resolution.Integrated in a single device on the engine of a DDS and a DAC has both advantages and disadvantages, however, whether integrated or not, need a DAC to produce ultra-high purity high-quality analog signal. DAC will conve
17、rt digital sinusoidal output to an analog sine wave may be single-ended or differential. Some of the key requirements for low phase noise, excellent wideband （WB） and narrowband （NB）, spurious-free dynamic range （SFDR）, and low power consumption. If the external device, the DAC must be fast enough t
18、o handle the signal, so the built-in parallel port device is very common.DDS and other solutionsThe frequency analog phase-locked loops （PLLs）, clock generator, and the use of FPGA dynamic programming of the output of the DAC. By examining the spectrum of performance and power of these technologies,
19、 a simple comparison, Table 1 shows the qualitative results of the comparisonTable 1.DDS with competing technologies - Advanced comparePower consumptionSpectral purityRemarksDDSLowMiddleEase of tuningDiscrete DAC+FPGAMiddle-HighWith tuning capabilitiesAnalog PLLMilddleHighDifficult tuningPhase-locke
20、d loop is a feedback loop and its components: a phase comparator, a divider and a pressure-controlled oscillator （VCO）, phase comparator reference frequency and output frequency （usually the output frequency is N）frequency） were compared. The error voltage generated by the phase comparator is used t
21、o adjust the VCO, thus the output frequency. When the loop is established, the output frequency and / or phase with the reference frequency to maintain a precise relationship. PLL has long been considered in a particular frequency range, high fidelity and consistent signal low phase noise and high s
22、purious free dynamic range （SFDR） are ideal for applications. PLL can not be precisely and quickly tuning the frequency output waveform, and the slow response, which limits their applicability for fast frequency hopping and part of the frequency shift keying and phase shift keying applications. Othe
23、r programs, including integrated DDS engine field programmable gate arrays （FPGAs） - a synthetic sine wave output with the off-the-shelf DAC - though the PLL frequency-hopping problem can be solved, but there own shortcomings. The defects of the major systems work and interface power requirements, h
24、igh cost, large size, and system developers must also consider the additional software, hardware and memory. For example, using the DDS engine option in the modern FPGA to generate the 10 MHz output signal dynamic range is 60 dB up to 72 kB memory space. In addition, designers need to accept and be
25、familiar with the subtle balance DDS core architecture. .From a practical point of view （see Table 2）, thanks to the rapid development of CMOS technology and modern digital design techniques, as well as the improvement of the DAC topology, DDS technology has been able to achieve unprecedented low po
26、wer consumption in a wide range of applications, spectrum performance and cost levels. Although the pure DDS products in performance and design flexibility to achieve the level of high-end DAC technology and FPGA, but the advantages of DDS in terms of size, power consumption, cost and simplicity, ma
27、king it the primary choice for many applications.Table 2 Benchmark Analysis Summary - frequency generation technique （50 MHz）Phase -locked loopDAC + FPGASpectral performanceSystem power requirementsDigital frequency tuningNoYesTuning response timeSolution sizeWaveform flexibilityCostDesign reuseImpl
28、ementation complexityAlso be noted that the DDS device for digital methods to produce the output waveform, it can simplify some of the architecture of the solution, or the waveform of digital programming to create the conditions. Usually with a sine wave to explain the functions and working principl
29、e of the DDS, but using modern DDS ICs can easily generate a triangle wave or square wave （clock） output, thereby eliminating the former case the lookup table, and the latter case the DAC the need to integrate a simple and accurate enough.Performance and limitations of the DDSImage and envelope: Sin
30、 （x） xx roll-offThe actual output of the DAC is not a continuous sine wave, but a series of pulses with a sinusoidal time envelope. The corresponding spectrum is a series of image and signal aliasing. Image along the sin （x） / x envelope distribution （see Figure 3 | margin | graph）. The need for the
31、 filter to suppress frequencies outside the target band, but can not inhibit the high-level in the passband aliasing （for example, caused due to DAC non-linear）The Nyquist criterion requires that each cycle requires at least two sampling points in order to rebuild the desired output waveform. The Mirroring response arising from sampling the output frequency K, CLOCK OUT In this example, which CLOCK = 25 25 MHz and fOUT = 5 MHz, the first and second mirror frequency appear in （see Figure 3） fCLOCK fOUT, o 20 MHz and 30 MHz. The third and fourth m
