1、毕业设计说明书外文文献及翻译外文文献：Embedded Systems Design using the TI MSP430 Series（selection）This book is intended for the embedded engineer who is new to the field, and as an introduction and reference for those experienced with micro-controller development, but are new to the MSP430 family of devices. I have a
2、ssumed that the reader has some experience with microcontroller-based design, either professionally or academically. As an example, the book de- scribes interrupt functionality in detail, but assumes that you, the reader, already know what an interrupt is and how to use it. It is also important to n
3、ote that, while much of the information in this book is identical to that which is available from the TI documentation, this book is intended to supplement, not replace that valuable source of information. The Users Guides and Application Notes together offer a depth and breadth of technical informa
4、tion that would be difficult to replicate in a single source. The intent of this book is to highlight some of the most commonly used information, along with some helpful suggestions and rules of thumb.The MSP430 FamilyThe MSP430 family is a broad family of low power, feature rich 16-bit microcontrol
5、lers from Texas Instruments. They share a common, RISC-type, Neumann CPU core. The 430 is competitive in price with the 8-bit controller market, and supports both 8 and 16-bit instructions, allowing migration from most similarly sized platforms.The family of devices ranges from the very small (1k RO
6、M, 128 bytes for RAM, sub-dollar) up to larger (60k ROM, 2k RAM, with prices in the $10 range) devices. Currently, there are at least 40 flavors available, with more being added regularly. The devices are split into three families: the MSP430x3xx, which is a basic unit, the MSP430x1xx, which is a mo
7、re feature-rich family, and the MSP430x4xx, which is similar to the 1xx, with a built in LCD driver. You will find these referred to as 1xx, 3xx, and 4xx devices throughout this book.Part Numbering ConventionPart numbers for MSP430 devices are determined based on their capabilities. All device part
8、numbers follow the following template:MSP430Mt Fa F bMcM: Memory TypeC: ROMF: FlashP: OTPE: EPROM (for developmental use. There are few of these.)F a, F b: Family and Features10, 11: Basic12, 13: Hardware UART14: Hardware UART, Hardware Multiplier31, 32: LCD Controller33: LCD Controller, Hardware UA
9、RT, Hardware Multiplier41: LCD Controller43: LCD Controller, Hardware UART44: LCD Controller, Hardware UART, Hardware MultiplierMc: Memory Capacity0: 1kb ROM, 128b RAM1: 2kb ROM, 128b RAM2: 4kb ROM, 256b RAM3: 8kb ROM, 256b RAM4: 12kb ROM, 512b RAM5: 16kb ROM, 512b RAM6: 24kb ROM, 1kb RAM7: 32kb ROM
10、, 1kb RAM8: 48kb ROM, 2kb RAM9: 60kb ROM, 2kb RAMExample: The MSP430F435 is a Flash memory device with an LCD controller, a hardware UART, 16 kb of code memory, and 512 bytes of RAM.The part numbering scheme described above is a bit fragmented. There are common features not consistently represented
11、(type of ADC, number of timers, etc), and there are some other inconsistencies (for example, the 33 family has the multiplier, but the 13 and 43s do not). I would recommend against selecting parts based on their numbering scheme. Rather, once you have a vague idea of your requirements, go to the TI
12、website (www.TI.com), and use their parametric sort feature.Architecture: CPU and MemoryAs discussed in chapter 1, the MSP430 utilizes a 16-bit RISC architecture, which is capable of processing instructions on either bytes or words. The CPU is identical for all members of the 430 family. It consists
13、 of a 3-stage instruction pipeline, instruction decoding, a 16-bit ALU, four dedicated-use registers, and twelve working (or scratchpad) registers. The CPU is connected to its memory through two 16-bit busses, one for addressing, and the other for data. All memory, including RAM, ROM, information me
14、mory, special function registers, and peripheral registers are mapped into a single, contiguous address space.This architecture is unique for several reasons. First, the designers at Texas Instruments have left an awful lot of space for future development. Almost half the Status Register remains ava
15、ilable for future growth, roughly half of the peripheral register space is unused, and only six of the sixteen available special function registers are implemented.Second, there are plenty of working registers. After years of having one or two working registers, I greatly enjoyed my first experience
16、 with the twelve 16-bit CPU scratchpads. The programming style is slightly different, and can be much more efficient, especially in the hands of a programmer who knows how to use this feature to its fullest.Third, this architecture is deceptively straightforward. It is very flexible, and the address
17、ing modes are more complicated than most other small processors. But, beyond that, this architecture is simple, efficient and clean. There are two busses, a single linear memory space, a rather vanilla processor core, and all peripherals are memory-mapped.CPU FeaturesThe ALUThe 430 processor include
18、s a pretty typical ALU (arithmetic logic unit). The ALU handles addition, subtraction, comparison and logical (AND, OR, XOR) operations. ALU operations can affect the overflow, zero, negative, and carry flags. The hardware multiplier, which is not available in all devices, is implemented as a periph
19、eral device, and is not part of the ALU (see Chapter 6).Working RegistersThe 430 gives the developer twelve 16-bit working registers, R4 through R15. (R0 through R3 are used for other functions, as described later.) They are used for register mode operations (see Addressing Modes, Chapter 8), which
20、are much more efficient than operations which require memory access. Some guidelines for their use:Use these registers as much as possible. Any variable which is accessed often should reside in one of these locations, for the sake of efficiency.Generally speaking, you may select any of these registe
21、rs for any purpose, either data or address. However, some development tools will reserve R4 and R5 for debug information. Different compilers will use these registers in different fashions, as well. Understand your tools.Be consistent about use of the working registers. Clearly document their use. I
22、 have code, written about 8 months ago, that performs extensive operations on R8, R9, and R15. Unfortunately, I dont know today what the values in R8, R9 and R15 represent. This was code I wrote to quickly validate an algorithm, rather than production code, so I didnt document it sufficiently. Now,
23、it is relative gibberish. Dont let this happen to you. No matter how obvious or trivial register use seems, document it anyway.Constant GeneratorsR2 and R3 function as constant generators, so that register mode may be used instead of immediate mode for some common constants. (R2 is a dual use regist
24、er. It serves as the Status Register, as well.) Generated constants include some common single-bit values (0001h, 0002h, 0004h, and 0008h), zero (0000h), and an all 1s field (0FFFFh). Generation is based on the W(S) value in the instruction word, and is described by the table below.W(S) value in R2
25、value in R300 0000h 01 (0) (absolute mode) 0001h10 0004h 0002h11 0008h 0FFFFhProgram CounterThe Program Counter is located in R0. Since individual memory location addresses are 8-bit, but all instructions are 16 bit, the PC is constrained to even numbers (i.e. the LSB of the PC is always zero). Gene
26、rally speaking, it is best to avoid direct manipulation of the PC. One exception to this rule of thumb is the implementation of a switch, where the code jumps to a spot, dependent on a given value. (I.e., if value=0, jump to location0, if value=1, jump to location1, etc.) This process is shown in Ex
27、ample 3.1.Example 3.1 Switch Statement via Manual PC ControlMov value,R15 ;put the switch value into R15Cmp R15,#8 ;range checkingJge outofrange ;if R157,do not use PC switchCmp #0,R15 ;more range checkingJn outofrange ;Rla R15 ;multiply R15 by two,since PC is always evenRla R15 ;double R15again,sin
28、ce symbolic jmp is 2 words longAdd R15,PC ;PC goes to proper jumpJmp value0Jmp value1Jmp value2Jmp value3Jmp value4Jmp value5Jmp value6Jmp value7OutofrangeJmp RangeErrorThis is a relatively common approach, and most C compilers will implement switch statements with something similar. When implementi
29、ng this manually (i.e., in assembly language), the programmer needs to keep several things in mind:Always do proper range checking. In the example, we checked for conditions outside both ends of the valid range. If this is not performed correctly, the code can jump to an unintended location.Pay clos
30、e attention to the addressing modes of the jump statements. The second doubling of R15, prior to the add statement, is added because the jump statement requires two words when symbolic mode addressing is used.Be careful that none of your interrupt handlers have the potential to affect your value reg
31、ister (R15 in the example). If the interrupt handler needs to use one of these registers, the handler needs to store the value to RAM first. The most common procedure is to push the register to the stack at the beginning of the ISR, and to pop the register at the end of the ISR. (See Example 3.2.)Ex
32、ample 3.2 Push/Pop Combination in ISRTimer_A_Hi_Interrupt Push R12 ;We will use R12 Mov P1IN,R12 ;use R12 as we please Rla R12Rla R12Mov R12&BAR ;Done with R12Pop R12 ;Restore previous value to R12Reti ;return from interruptORG 0FFF0hDW Timer_A_Hi_InterruptStatus RegisterThe Status Register is implemented in R2, and is comprised of various system flags. The flags are all directly accessible by code, and all but three of them are changed automatically by the processor itself. The 7 most sig
