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    ESL电子纸屏说明书英文版.docx

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    ESL电子纸屏说明书英文版.docx

    1、ESL电子纸屏说明书英文版 TECHNICAL SPECIFICATION MODEL NO: WF021-01BThe content of this information is subject to changed with out notice.Please contact WF or its agent for further information. Customers ConfirmationCustomer: Date: By: WFs Confirmation Confirmed By: Prepared By: Revision HistoryRev.Issued Date

    2、Revised Contents1.0Jul. 1,2011Preliminary1.1SEP.4.20111.Modify Mechanical Drawing of EPD module2.Delete 7-3-1-2) MCU Parallel 6800-series Interface3.Delete7-3-1-3) MCU Parallel 8080-series Interface4.Delete7-3-2) Timing Characteristics of 6800-Series MCU Parallel Interface5.Delete 7-3-3)Timing Chara

    3、cteristics of 8080-Series MCU Parallel Interface6.Figure . 7-6 (1) Modify 41 pin conector to 24 pin connectorTECHNICAL SPECIFICATIONCONTENTSNO.ITEMPAGE-Cover1-Revision History2 -Contents31Application42Features43Mechanical Specifications44Mechanical Drawing of EPD module55Input/Output Terminals66Comm

    4、and Table107Electrical Characteristics138Typical Operating Sequence219Optical Characteristics2310Handling, Safety and Environment Requirements2511Reliability test2612Block Diagram271.Over ViewThe display is a TFT active matrix electrophoretic display , with interface and a reference system design. T

    5、he 2.04” active area contains 17272 pixels, and has 1-bit and 2-bit full display capabilities. An integrated circuit contains gate buffer, source buffer, interface, timing control logic, oscillator, DC-DC. SRAM. LUT ,VCOM, and border are supplied with each panel.2.Features High contrast High reflect

    6、ance Ultra wide viewing angle Ultra low power consumption Pure reflective mode Bi-stable Commercial temperature range Landscape, portrait mode Antiglare hard-coated front-surface Low current deep sleep mode On chip display RAM Waveform stored in On-chip OTP Serial peripheral interface available On-c

    7、hip oscillator On-chip booster and regulator control for generating VCOM, Gate and source driving voltage . I2C Signal Master Interface to read external temperature sensor Available in COG package IC thickness 250um3.Mechanical SpecificationsParameterSpecificationsUnitRemarkScreen Size2.04InchDispla

    8、y Resolution172(H)72(V)PixelDpi:95Active Area20.16(H)48.16(V)MmPixel Pitch0.2800.280MmPixel ConfigurationRectangleOutline Dimension29.20(H59.20(V) 1.18(D)MmWeight40.5g4. Mechanical Drawing of EPD module5. Input/Output Terminals5-1) Pin out ListPin #TypeSingleDescriptionRemark1NCDo not connect with o

    9、ther NC pinsKeep Open2OGDRN-Channel MOSFET Gate Drive Control3ORESECurrent Sense Input for the Control Loop4CVGLNegative Gate driving voltage5CVGHPositive Gate driving voltage6OTSCLI2C Interface to digital temperature sensor Clock pin7I/OTSDAI2C Interface to digital temperature sensor Date pin8IBS1B

    10、us selection pinNote 5-59OBUSYBusy state output pinNote 5-410IRES #ResetNote 5-311ID/C #Data /Command control pinNote 5-212ICS #Chip Select input pinNote 5-113I/OD0serial clock pin (SPI)14I/OD1serial data pin (SPI)15CVDDIOPower for interface logic pins16IVCIPower Supply pin for the chip17VSSGround18

    11、CVDDCore logic power pin19CVPPPower Supply for OTP Programming20CVSHPositive Source driving voltage21CPREVGHPower Supply pin for VGH and VSH22CVSLNegative Source driving voltage23CPREVGLPower Supply pin for VCOM, VGL and VSL24CVCOMVCOM driving voltageNote 5-1: This pin is the chip select input conne

    12、cting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW in parallel interface. When CS# is not in use, please connect to VCI or VSS.Note 5-2: This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the data at 7:0 will be interpreted a

    13、s data. When the pin is pulled LOW, the data at D7:0 will be interpreted as command.Note 5-3: This pin is reset signal input. Active Low.Note 5-4:This pin is Busy state output pin. When Busy is High, the operation of chip should not be interrupted, command should not be sent. e.g., The chip would pu

    14、t Busy pin High when -Outputting display waveform; or-Programming with OTP-Communicating with digital temperature sensorNote 5-5: Table: Bus interface selection6. Command TableD/C# =0, R/W# (WR#) =0, E(RD# =1)unless specific setting is stated.7. Electrical Characteristics7-1) Absolute maximum rating

    15、ParameterSymbolRatingUnitLogic Supply VoltageVCI-0.5 to +3.6VLogic Input VoltageVIN-0.5 to VCI +0.5VLogic Output VoltageVOUT-0.5 to VCI +0.5VOperating Temp. rangeTOPR0 to +50Storage Temp. rangeTSTG-25 to +707-2) Panel DC CharacteristicsThe following specifications apply for : VSS = 0V, VCI = 3.0V, T

    16、A = 25ParameterSymbolConditionsMinTypMaxUnitSingle groundVSS-0-VLogic Supply VoltageVCI-2.43.03.3VHigh level input voltageVIH-0.8VCI-VLow level input voltageVIL-0.2VCIVHigh level output voltageVOHIOH= -100uA0.9VCI-VLow level output voltageVOLIOH= 100uA-0.1VCIVMaximum power panelPMAX-3.610mWStandby p

    17、ower panelTSTBY-TBDmWTypical power panelPTYP-0.657-mWOperating temperature-0-50Storage temperature-25-70Maximum image updateTime at 25-1000-msDeep sleep mode currentVCIDC/DC offNo clockNo input loadRam data not retain-25uASleep mode currentVCIDC/DC offNo clockNo input loadRam data retain-3550uA- The

    18、 Typical power consumption is measured with following pattern transition: from horizontal 4 gray scale pattern to vertical 4 gray scale pattern.(Note 7-1)- The standby power is the consumed power when the panel controller is in standby mode.- The listed electrical/optical characteristics are only gu

    19、aranteed under the controller & waveform provided by WF- Vcom is recommended to be set in the range of assigned value 0.1V.Note 7-1The Typical power consumption 7-3) Panel AC CharacteristicsThe following specifications apply for : VSS = 0V, VCI = 3.0V, TA = 25ParameterSymbolConditionsMinTypMaxUnitIn

    20、ternal Oscillator frequencyFoscVCI=2.4 to 3.3V0.9511.05MHz7-3-1) MCU InterfaceNote 7-2 : L is connected to VSSNote 7-3 : H is connected to VCI7-3-1-1) MCU Interface SelectionMCU interface consist of 2 data/command pins and 3 control pins .The pin assignment at different interface mode is summarized

    21、in Table 7-1. Different MCU mode can be set by hardware selection on BS1 pins. The display panel only supports spi4 or spi3 interface mode.Pin NameData/Command InterfaceControl SignalBus interfaceD1D0CS#D/C#RES#SPI4SDinSCLKCS#D/C#RES#SPI3SDinSCLKCS#LRES#MCU interface assignment under different bus i

    22、nterface mode7-3-1-2) MCU Serial Interface (4-wire SPI)The serial interface consists of serial clock SCLK, serial data SDIN, D/C# , CS#. In SPI mode ,D0 acts as SCLK, D1 acts as SDIN .FunctionCS#D/C#SCLKWrite CommandLLWrite dataLHControl pins of Serial interfaceNote 7-9 : stands for rising edge of s

    23、ignalSDIN is shifted into an 8-bit shift register on every rising edge of SCLK in order of D7,D6, D0.D/C# is sampled on every eighth clock and the data byte in the shift register is written to the Graphic Display Data RAM(RAM) or command register in the same clock.Under serial mode, only write opera

    24、tions are allowed.7-3-1-3) MCU Serial Interface (3-wire SPI)The 3-wire serial interface consists of serial clock SCLK, serial data ADIN and CS#.In 3-wire SPI mode,D0 acts as SCLK, D1 acts as SDIN, The pin D/C# can be connected to an external ground.The operation is similar to 4-wire serial interface

    25、 while D/C# pin is not used. There are altogether 9-bits will be shifted into the shift register on every ninth clock in sequence : D/C# bit, D7 to D0 bit. The D/C# bit (first bit of the sequential data ) will determine the following data byte in shift register is written to the Display Data RAM (D/

    26、C# bit = 1) or the command register (D/C# bit = 0).Under serial mode ,only write operations are allowed.FunctionCS#D/C#SCLKWrite CommandLTie LOWWrite dataLTie LOWControl pins of 3-wire Serial interfaceNote 7-10 : stands for rising edge of signal7-3-2) Timing Characteristics of Series Interface Serie

    27、s Interface Timing Characteristics (VCI - VSS = 1.8 V to 2.0 v , TA = 25, CL = 20 pF)SymbolParameterMinTypMaxUnittcycleClock Cycle Time250-nstASAddress Setup Time150-nstAHAddress Hold Time150-nstCSSChip Select Setup Time120-nstCSHChip Select Hold Time60-nstDSWWrite Data Setup Time50-nstDHWWrite Data

    28、 Hold Time15-nstCLKLClock Low Time100-nstCLKHClock High Time100-nstRRise Time 20%80%-15nstFFall Time 20%80%-15ns Series interface characteristics7-4) Power ConsumptionParameterSymbolConditionsTYPMaxUnitRemarkPanel power consumption during update-5680mW-Power consumption in standby mode-TBDmW-7-5) Reference Circuit Figure . 7-5 (1) Figure . 7-5 (2) Figure . 7-5 (3) Figure . 7


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