1、哈工大电信学院FPGA设计与应用串口通信实验报告FPGA设计与应用串口通信实验报告班级: 1105103 姓名: 郭诚 学号: 1110510304 日期: 2014年10月30日 实验性质:验证性 实验类型:必做开课单位:电信院 学时:2学时一、实验目的1、了解串口通信的基本原理;2、掌握锁相环的基本原理和使用方法;3、掌握起始位和停止位的含义及实现方法;4、掌握VHDL状态机的基本使用方法;5、掌握基本的接口设计和调试技巧;二、实验准备2.1 串口通信原理(1分)串口通信指口按位发送和接收字节。通信使用3根线完成,分别是地线、发送、接收。由于串口通信是异步的,端口能够在一根线上发送数据同时
2、在另一根线上接收数据。其他线用于握手,但不是必须的。串口通信最重要的参数是波特率、数据位、停止位和奇偶校验。对于两个进行通信的端口,这些参数必须匹配。波特率表示每秒传输的位数,接受发送双方必须匹配。不发送数据时,连线上为高电平。发送数据时,要首先发送一个起始位,为低电平,然后按照协议发送需要的数据,八位或者九位(带有校验位),然后发送一个停止位,为高电平。接收时,要首先确定起始位,然后按照协议接受八位或者九位数据。接受完成后继续判断起始位,开始下一个接受周期。2.2 锁相环的基本原理(1分)锁相环的框图如上所示,主要包括:相器、环路滤波器、压控振荡器、分频器构成。鉴相器用来鉴别输入信号与输出信
3、号之间的相位差,并输出误差电压Ud。Ud 中的噪声和干扰成分被低通性质的环路滤波器滤除,形成压控振荡器的控制电压Uc。Uc作用于压控振荡器的结果是把它的输出振荡频率fo拉向环路输入信号频率fi,当二者相等时,环路被锁定,称为入锁。维持锁定的直流控制电压由鉴相器提供,因此鉴相器的两个输入信号间留有一定的相位差。三、代码及测试3.1程序及分析(2分)串口接收程序及分析LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY GC_DIV ISPORT(CLK : IN STD_LOGIC; -锁相
4、环输出时钟57.69M COUT1 : OUT STD_LOGIC; -分频器输出采样时钟576k COUT2 : OUT STD_LOGIC); -分频器产产生扫描时钟100hzEND GC_DIV;ARCHITECTURE BEHAV OF GC_DIV ISBEGINPROCESS(CLK) VARIABLE COUT1_NUM : STD_LOGIC_VECTOR(5 DOWNTO 0):=(OTHERS = 0); -输出时钟1 计数器 VARIABLE COUT2_NUM : STD_LOGIC_VECTOR(20 DOWNTO 0):=(OTHERS = 0); -输出时钟2 计
5、数 VARIABLE COUT1_1 : STD_LOGIC; VARIABLE COUT2_2 : STD_LOGIC; BEGIN IF RISING_EDGE(CLK) THEN IF COUT1_NUM = 49 THEN COUT1_1 := NOT COUT1_1; COUT1_NUM := (OTHERS = 0); ELSE COUT1_NUM := COUT1_NUM + 1; END IF; IF COUT2_NUM = 576000 THEN COUT2_2 := NOT COUT2_2; COUT2_NUM := (OTHERS = 0); ELSE COUT2_NUM
6、 := COUT2_NUM + 1; END IF; COUT1 = COUT1_1; COUT2 = 10 THEN -判断是否真开端 IF SAM_NUM_0 = 6 THEN CURRENT_STATE := REC; SAM_NUM_0 := 0; SAM_NUM_1 := 0; ELSE CURRENT_STATE := SPARE; END IF; ELSE CURRENT_STATE := READY; END IF; ELSIF CURRENT_STATE = REC THEN IF INNUM = 0 THEN SAM_NUM_0 := SAM_NUM_0 + 1; ELSE
7、 SAM_NUM_1 := SAM_NUM_1 + 1; END IF; IF (SAM_NUM_0 + SAM_NUM_1) = 10 THEN -接受数据判断 IF SAM_NUM_0 = 6 THEN TR_INNUM(TR_INNUM_NUM) = 0; ELSE TR_INNUM(TR_INNUM_NUM) = 8 THEN CURRENT_STATE := STOP; TR_INNUM_NUM := 0; ELSE CURRENT_STATE := REC; END IF; ELSE CURRENT_STATE := REC; END IF; ELSIF CURRENT_STATE
8、 = STOP THEN IF INNUM = 1 THEN SAM_NUM_1 := SAM_NUM_1 + 1; ELSE SAM_NUM_0 := SAM_NUM_0 + 1; END IF; IF (SAM_NUM_0 + SAM_NUM_1) = 10 THEN IF SAM_NUM_1 = 6 THEN TRUE := 1; CURRENT_STATE := SPARE; END IF; SAM_NUM_0 := 0; SAM_NUM_1 := 0; ELSE CURRENT_STATE := STOP; END IF; ELSE CURRENT_STATE := SPARE; E
9、ND IF; END IF; END PROCESS; LED_H =0111111 when TR_INNUM(7 downto 4) = 0 else 0000110 when TR_INNUM(7 downto 4) = 1 else 1011011 when TR_INNUM(7 downto 4) = 2 else 1001111 when TR_INNUM(7 downto 4) = 3 else 1100110 when TR_INNUM(7 downto 4) = 4 else 1101101 when TR_INNUM(7 downto 4) = 5 else 1111101
10、 when TR_INNUM(7 downto 4) = 6 else 0000111 when TR_INNUM(7 downto 4) = 7 else 1111111 when TR_INNUM(7 downto 4) = 8 else 1101111 when TR_INNUM(7 downto 4) = 9 else 1110111 when TR_INNUM(7 downto 4) = 10 else 1111100 when TR_INNUM(7 downto 4) = 11 else 0111001 when TR_INNUM(7 downto 4) = 12 else 101
11、1110 when TR_INNUM(7 downto 4) = 13 else 1111001 when TR_INNUM(7 downto 4) = 14 else 1110001; LED_L =0111111 when TR_INNUM(3 downto 0) = 0 else 0000110 when TR_INNUM(3 downto 0) = 1 else 1011011 when TR_INNUM(3 downto 0) = 2 else 1001111 when TR_INNUM(3 downto 0) = 3 else 1100110 when TR_INNUM(3 dow
12、nto 0) = 4 else 1101101 when TR_INNUM(3 downto 0) = 5 else 1111101 when TR_INNUM(3 downto 0) = 6 else 0000111 when TR_INNUM(3 downto 0) = 7 else 1111111 when TR_INNUM(3 downto 0) = 8 else 1101111 when TR_INNUM(3 downto 0) = 9 else 1110111 when TR_INNUM(3 downto 0) = 10 else 1111100 when TR_INNUM(3 d
13、ownto 0) = 11 else 0111001 when TR_INNUM(3 downto 0) = 12 else 1011110 when TR_INNUM(3 downto 0) = 13 else 1111001 when TR_INNUM(3 downto 0) = 14 else 1110001; PROCESS(CLK_DIS) VARIABLE A : STD_LOGIC; BEGIN IF RISING_EDGE(CLK_DIS) THEN IF A = 0 THEN LED = LED_L; LED_EN = 0001; A := 1; ELSE LED = LED
14、_H; LED_EN = 0010; A := 0; END IF; END IF; END PROCESS;END BEHAV;END BEHAV;接收部分采用发送部分10倍频的时钟对接收数据进行采样。每采样10次进行一次判断,若低电平多于6次则判决为0,若高电平多于6次则判决为1。若当前为ready,则判决为低电平后下一时刻转入rec状态。每接收一位数据计数加一,接收8位数据后转入stop状态。Stop状态的下一时钟周期进入spare状态。8位数据全部接收完后,送到数码管显示。数码管采用七段码译码,高四位和低四位分别由数码管的最低位和倒数第二位显示。3.2 SignalTap II波形测试结果(1分)(1)串口发送程序的SignalTap II波形测试(2)串口接收程序的SignalTap II波形测试四、论述若串口采用1位起始位,1位停止位,1位奇偶校验位的通信方式,试画出该串口发送数据XXH的波形图。其中XX代表学号的最后两位,例如学号最后两位为15的,就画出发送数据15H的波形图。(1分)答:学号是111051010204,发送的数据位04H。奇校验:偶校验: